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Zakładka z wyszukiwarką danych komponentów |
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Zakładka z wyszukiwarką danych komponentów |
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LSM330DLTR Arkusz danych(PDF) 49 Page - STMicroelectronics |
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LSM330DLTR Arkusz danych(HTML) 49 Page - STMicroelectronics |
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49 / 54 page  LSM330DL Registers description Doc ID 022018 Rev 1 49/54 7.45 INT1_DURATION_G (38h) The D6 - D0 bits set the minimum duration of the interrupt event to be recognized. The duration of the steps and maximum values depend on the ODR chosen. The WAIT bit has the following meaning: Wait =’0’: the interrupt falls immediately if the signal crosses the selected threshold Wait =’1’: if the signal crosses the selected threshold, the interrupt falls only after the duration has counted the number of samples at the selected data rate, written into the duration counter register. Figure 13. Wait disabled Table 106. INT1_DURATION_G register WAIT D6 D5 D4 D3 D2 D1 D0 Table 107. INT1_DURATION_G description WAIT WAIT enable. Default value: 0 (0: disable; 1: enable) D6 - D0 Duration value. Default value: 000 0000 |
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