74LVC2G125 datasheet(9/22 Pages) PHILIPS

9 / 22 page

74LVC2G125

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 12 — 1 December 2011

9 of 22

NXP Semiconductors

74LVC2G125

Dual bus buffer/line driver; 3-state

12. Waveforms

Measurement points are given in Table 9.

Logic levels: VOL and VOH are typical output voltage levels that occur with the output load.

Fig 7.

Propagation delay input (nA) to output (nY)

mna230

tPHL

tPLH

nA input

nY output

GND

VOH

VOL

Measurement points are given in Table 9.

Logic levels: VOL and VOH are typical output voltage levels that occur with the output load.

Fig 8.

3-state output enable and disable times

mna362

tPLZ

tPHZ

outputs

disabled

outputs

enabled

outputs

enabled

output

LOW-to-OFF

OFF-to-LOW

output

HIGH-to-OFF

OFF-to-HIGH

nOE input

VOL

VOH

VCC

GND

tPZL

tPZH

Table 9.

Measurement points

Supply voltage

Input

Output

VCC

1.65 V to 1.95 V

0.5VCC

VOL + 0.15 V

VOH  0.15 V

2.3 V to 2.7 V

0.5VCC

VOL + 0.15 V

VOH  0.15 V

2.7 V

1.5 V

VOL + 0.3 V

VOH  0.3 V

3.0 V to 3.6 V

1.5 V

VOL + 0.3 V

VOH  0.3 V

4.5 V to 5.5 V

0.5VCC

VOL + 0.3 V

VOH  0.3 V

74LVC2G125 Arkusz danych(PDF) 9 Page - NXP Semiconductors

74LVC2G125 Arkusz danych(HTML) 9 Page - NXP Semiconductors

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22

Arkusz danych Pobierz

Link URL