CLC1018ISO8X datasheet(10/17 Pages) CADEKA

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Data Sheet

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Application Information

General Description

The CLC1008 family are a single supply, general purpose,

voltage-feedback amplifiers fabricated on a complementary

bipolar process. The CLC1008 offers 75MHz unity gain

bandwidth, 50V/μs slew rate, and only 505μA supply current.

It features a rail-to-rail output stage and is unity gain stable.

Figures 1, 2, and 3 illustrate typical circuit configurations for

non-inverting, inverting, and unity gain topologies for dual

supply applications. They show the recommended bypass

capacitor values and overall closed loop gain equations.

Figure 4 shows the typical non-inverting gain circuit for

single supply applicaitons.

The common mode input range extends to 300mV below

ground in single supply operation. Exceeding these values

will not cause phase reversal. However, if the input voltage

exceeds the rails by more than 0.5V, the input ESD devices

will begin to conduct.

The design uses a Darlington output stage. The output

stage is short circuit protected and offers “soft” saturation

protection that improves recovery time.

0.1μF

6.8μF

Output

G = 1 + (Rf/Rg)

Input

+Vs

-Vs

0.1μF

6.8μF

Figure 1. Typical Non-Inverting Gain Circuit

0.1μF

6.8μF

Output

G = - (Rf/Rg)

For optimum input offset

voltage set R1 = Rf || Rg

Input

+Vs

-Vs

0.1μF

6.8μF

Figure 2. Typical Inverting Gain Circuit

0.1uF

6.8uF

Output

G = 1

Input

+Vs

-Vs

0.1uF

6.8uF

Figure 3. Unity Gain Circuit

0.1μF

6.8μF

Out

+Vs

Figure 4. Single Supply Non-Inverting Gain Circuit

For optimum response at a gain of +2, a feedback resistor

of 1kΩ is recommended. Figure 5 illustrates the CLC1008

frequency response with both 1kΩ and 2kΩ feedback

resistors.

Frequency (MHz)

0.1

100

G = 2

RL = 1kΩ

Rf = 1kΩ

Rf = 2kΩ

Figure 5. Frequency Response vs. Rf

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