AD6672

Rev. 0 | Page 4 of 32

SPECIFICATIONS

ADC DC SPECIFICATIONS

AVDD = 1.8 V, DRVDD = 1.8 V, maximum sample rate, VIN = −1.0 dBFS differential input, 1.75 V p-p full-scale input range,

DCS enabled, unless otherwise noted.

Table 1.

Parameter

Temperature

Min

Typ

Max

Unit

RESOLUTION

Full

11

Bits

ACCURACY

No Missing Codes

Full

Guaranteed

Offset Error

Full

±11

mV

Gain Error

Full

+3/−6.5

% FSR

Differential Nonlinearity (DNL)

Full

±0.2

LSB

25°C

±0.1

LSB

Integral Nonlinearity (INL)1

Full

±0.3

LSB

25°C

±0.12

LSB

TEMPERATURE DRIFT

Offset Error

Full

±7

ppm/°C

Gain Error

Full

±85

ppm/°C

INPUT-REFERRED NOISE

VREF = 1.0 V

25°C

0.65

LSB rms

ANALOG INPUT

Input Span

Full

1.75

V p-p

Input Capacitance2

Full

5

pF

Input Resistance

Full

20

kΩ

Input Common-Mode Voltage

Full

0.9

V

POWER SUPPLIES

Supply Voltage

AVDD

Full

1.7

1.8

1.9

V

DRVDD

Full

1.7

1.8

1.9

V

Supply Current

Full

136

145

mA

Full

63

68

mA

Full

89

mA

Full

99

mA

POWER CONSUMPTION

Sine Wave Input (DRVDD = 1.8 V, NSR Disabled)

Full

358

385

mW

Sine Wave Input (DRVDD = 1.8 V, NSR Enabled,

22% Bandwidth Mode)

Full

405

mW

Sine Wave Input (DRVDD = 1.8 V, NSR Enabled,

33% Bandwidth Mode)

Full

423

mW

Standby Power3

Full

50

mW

Power-Down Power

Full

5

mW

for the equivalent analog input structure.

Figure 18