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SP6660EB Arkusz danych(PDF) 14 Page - Sipex Corporation |
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SP6660EB Arkusz danych(HTML) 14 Page - Sipex Corporation |
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14 / 22 page ![]() SP6660DS/11 SP6660 200mA Charge Pump Inverter or Doubler © Copyright 2000 Sipex Corporation 14 Oscillator Control Refer to Figure 23 for a table of the four control modes of the SP6660 internal oscillator frequencies. In the first mode, FC and OSC are open (unconnected) and the internal oscillator typically runs at 10kHz. OSC is internally connected to a 15pF capacitor. In the second mode, FC is connected to V+. The charge and discharge current at OSC changes from 1.0 µA to 8.0µA, increasing the oscillator frequency eight times to 80kHz. In the third mode, the oscillator frequency is lowered by connecting a capacitor between OSC and GND. FC can still multiply the frequency by eight times in this mode, but for a lower range of frequencies. Refer to Figure 11 for these ranges. In the fourth mode, any standard CMOS logic output can be used to drive OSC. OSC may be overdriven by an external oscillator that swings between V IN and GND. When OSC is overdriven, FC has no effect. Unlike the 7660 and 660 industry standards, designers may overdrive the oscillator of the SP6660 in both the inverting and the Voltage Doubling Mode. Figure 23. Four control modes for the SP6660 Oscillator Frequency C FC S O r o t a l l i c s O y c n e u q e r Fy c n e u q e r F y c n e u q e r F y c n e u q e r Fy c n e u q e r F n e p on e p ol a c i p y t z H k 0 1 + Vn e p ol a c i p y t z H k 0 8 + V r o n e p o l a n r e t x e r o t i c a p a c o t r e f e r 1 1 e r u g i F n e p o l a n r e t x e k c o l c k c o l c l a n r e t x e y c n e u q e r f Optimizing Loss Conditions Losses in SP6660 applications can be anticipated from the following: 1. Output Resistance: V LOSS Ω = ILOAD x ROUT where V LOSS Ω is the voltage drop due to the SP6660 output resistance, I LOAD is the load current, and R OUT is the SP6660 output resistance. 2. Charge Pump Capacitor ESR: V LOSSC1 ≈ 4 x ESRC1 x ILOAD where V LOSSC1 is the voltage drop due to the charge pump capacitor, C1, ESR C1 is the ESR of C1, and I LOAD is the load current. The loss in C1 is larger than the loss in the reservoir capacitor, C2, because it handles a current almost four times larger than the load current during charge- pump operation. As a result of this, a change in the capacitor ESR has a much greater impact on the performance of the SP6660 for C1 than for C2. 3. Reservoir Capacitor ESR: V LOSSC2 = ESRC2 x ILOAD where V LOSSC2 is the voltage drop due to the reservoir capacitor C2, ESR C2 is the ESR of C2, and I LOAD is the load current. Increasing the capacitance of C2 and/or reducing its ESR can reduce the output ripple that may be caused by the charge pump. A designer can filter high-frequency noise at the output by implementing a low ESR capacitor at C2. Generally, capacitors with larger capacitance values and higher voltage ratings tend to reduce ESR. |
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