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M41TC8025 Arkusz danych(PDF) 2 Page - STMicroelectronics |
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M41TC8025 Arkusz danych(HTML) 2 Page - STMicroelectronics |
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2 / 8 page ![]() Device overview M41TC8025 2/8 Doc ID 023561 Rev 2 1 Device overview Figure 1. Logic diagram 1. IRQ is an open-drain output 2. FOUT is a CMOS output Figure 2. Pinout Note: Be sure to connect a 0.1 µF to 1 µF bypass capacitor between VCC and VSS. Table 2. Pin description Pin Name Description 1 NC No connect. The NC pin can be connected to VCC, GND or left floating. 2 SCL Serial clock input 3 FOUT Programmable frequency output (CMOS). The FOUT pin is Hi-Z if FOE is low. 4 NF No function. The NF pin can be connected to VCC, GND or left floating. 5 DU Do not use externally. The DU pin must be left floating. 6VCC Power supply 7 FOE Frequency output enable, controls the frequency output on FOUT pin 8 NC No connect. The NC pin can be connected to VCC, GND or left floating. 9 NF No function. The NF pin can be connected to VCC, GND or left floating. 10 IRQ Interrupt output (open drain) 11 VSS Ground supply 12 NF No function. The NF pin can be connected to VCC, GND or left floating. 13 SDA Serial data input/output 14 NC No connect. The NC pin can be connected to VCC, GND or left floating. |
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