STLC3075_09 datasheet(7/36 Pages) STMICROELECTRONICS

7 / 36 page

STLC3075

Pin description

7/36

Protection resistors image (the image resistor is connected from this node to ZAC)

Balance network for 2 to 4 wire conversion (the balance impedance ZB is connected

from this node to AGND. ZA impedance is connected from this node to ZAC1).

CAC

AC feedback input, AC/DC split capacitor (CAC)

4 wire output port (TX output). The signal is referred to AGND. If connected to single

supply CODEC input it must be DC decoupled with proper capacitor.

Flyback compensation

Feedback input for DC/DC converter controller

CLK

Power switch controller clock (typ. 125 kHz). This pin can also be connected to CVCC

or AGND. When the CLK pin is connected to CVCC an internal auto-oscillation is

internally generated and it is used instead of the external clock. When the CLK pin is

connected to AGND, the GATE output is disabled.

GATE

Driver for external power MOS transistor (P-channel in buckboost configuration, N-

channel in flyback configuration).

RSENSE

Voltage input for current sensing. RSENSE resistor should be connected close to this

pin and VPOS pin (Buckboost) or GND (Flyback). The PCB layout should minimize the

extra resistance introduced by the copper tracks.

VPOS

Positive supply input

CVCC

Internal positive voltage supply filter

AGND

Analog ground. Must be shorted with BGND.

RLIM

Constant current feed programming pin (via RLIM). RLIM should be connected close

to this pin and AGND pin to avoid noise injection.

IREF

Internal bias current setting pin. RREF should be connected close to this pin and

AGND pin to avoid noise injection.

RTH

Off-hook threshold programming pin (via RTH). RTH should be connected close to this

pin and AGND pin to avoid noise injection.

DC feedback and ring trip input. RD should be connected close to this pin and AGND

pin to avoid noise injection.

ILTF

Transversal line current image output

CSVR

Battery supply filter capacitor

BGND

Battery ground, must be shorted with AGND

VBAT

Regulated battery voltage self generated by the device via DC/DC converter. Must be

shorted to VBAT1.

RING

2 wire ports; RING wire (Ib is the current sunk into this pin)

TIP

2 wire ports; TIP wire (Ia is the current sourced from this pin)

CREV

Reverse polarity transition time control. A proper capacitor connected between this pin

and AGND is setting the reverse polarity transition time. This is the same transition

time used to shape the ’trapezoidal ringing’ during ringing injection.

VBAT1

Frame connection. Must be shorted to VBAT

Table 2.

Pin description (continued)

N°

Function

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