WM8725

Production Data

w

PD ,Rev 4.3, February 2012

7

Figure 2 Power on/off Reset Timing

SYMBOL

Min

Typ

Max

Unit

Vpor

0.85

1.0

1.2

V

Vpor_off

2.25

2.5

2.75

V

Table 1 Power on/off Reset Timing

At power on, when VDD and VMID have been established, PORB is released and the

WM8725 has been reset.

At power down, PORB is asserted low whenever VMID drops below the minimum threshold of

Vpor_off.

If VDD is removed at any time, the internal power-on reset circuit is powered down and PORB

will follow VDD.