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AS2504 Arkusz danych(PDF) 5 Page - ams AG |
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AS2504 Arkusz danych(HTML) 5 Page - ams AG |
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5 / 12 page ![]() Preliminary Data Sheet AS2504 5/12 August 1998 The gain of the ATI1 —> LS is set to 6dB. The input is unbalanced with an impedance of 25k Ω. There is no softclipping. The gain of the ATI2 —> LS is set to 20dB. The input is unbalanced with an impedance of 100k Ω. There is no softclipping. Intercom path The gain of the ATI3 —> ROH1 is set to 6dB. The input is unbalanced with an impedance of 100k Ω. There is no softclipping. The gain of the ATI3 —> ROH2 is set to 12dB. The input is unbalanced with an impedance of 100k Ω. There is no softclipping. The gain of the M1/M2 —> ARO1 is set to 23dB. The input is differential with an impedance of 20k Ω. The soft clip circuit limits the output voltage at ARO1 to 0.4Vp. The attack time is 30µs/6dB and the decay time is 20ms/6dB. The gain of the M3/M4 —> ARO1 is set to 29dB. The input is differential with an impedance of 10k Ω. The soft clip circuit limits the output voltage at ARO1 to 0.4Vp. The attack time is 30µs/6dB and the decay time is 20ms/6dB. Receive path The gain of the LS —> ROH1 receive path is set to 3dB. The receive input is the differential signal of RI and STB. The soft clip circuit limits the output voltage at ROH1 to 0.7Vp. It prevents harsh distortion and acoustic shock. There is volume control and LLC for this path. The gain of the LS —> ROH2 receive path is set to 9dB. The receive input is the differential signal of RI and STB. The soft clip circuit limits the output voltage at ROH2 to 1.4Vp. It prevents harsh distortion and acoustic shock. There is volume control and LLC for this path. The gain of the LS —> ARO1 receive path is set to 3dB. The receive input is the differential signal of RI and STB. There is no softclipping, no LLC and no volume control for this path. Rx volume control The volume control is available for LS —> ROH1 and LS —> ROH2. It can be decreased by 6dB and increased by 8dB in 2dB steps from the default levels as described in the last paragraph. It remains in the pre-set position as long as VDD does not decrease less than 2.2V Line Loss Compensation The line loss compensation is a pin option. When it is activated, the transmit and receive gains for both I/O’s are decreased by 6dB at line currents from 20mA to 50mA when the LLC-pin is connected to AGND and from 45mA to 75mA when the LLC-pin is connected to VDD. The line loss compensation is deactivated when LLC-pin is connected to VSS. Digital interface The selection of the available signal paths must be set via the digital control pins. The following modes are possible: HSS: bit RX0: bit 0 0 LS —> ROH1 1 0 LS —> ROH2 0 1 ATI3 —> ROH1 1 1 ATI3 —> ROH2 AUX0: bit AUX1: bit HSS: bit 11 X MUTE 01 0 M1/M2 —> ARO1 01 1 M3/M4 —> ARO1 10 X LS —> ARO1 00 X MUTE TX0: bit TX1: bit HSS: bit 0 0 0 M1/M2 —> LS 0 0 1 M3/M4 —> LS 01 X ATI1 —> LS 10 X ATI2 —> LS 11 X MUTE |
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