AD7010

REV. B

–4–

TRANSMIT SECTION TIMING

Parameter

Units

Description

10

ns min

POWER Setup Time.

ns max

ns max

MCLK rising edge, after POWER high, to READY rising edge.

10

ns min

BIN Setup Time.

ns max

ns max

MCLK to READY low propagation delay.

ns

MCLK rising edge, after BIN high, to first TxCLK rising edge.

ns

TxCLK Cycle Time.

ns

TxCLK High Time.

ns

TxCLK Low Time.

50

ns min

TxCLK falling edge to TxDATA setup time.

0

ns min

TxCLK falling edge to TxDATA hold time.

ns max

BIN low setup to last transmitted symbol after ramp down.

ns max

BIN low hold to last transmitted symbol after ramp down.

ns

Ramp down cycle time after the last transmitted symbol.

ns max

Last TxCLK falling edge to READY rising edge.

10

ns max

Digital Output Rise Time.

10

ns max

Digital Output Fall Time.

MCLK

READY

BIN

TxCLK

TxDATA

Y

k

t

4

t

5

t

7

t

9

t

10

t

11

t

12

t

13

t

8

t

6

X

k

POWER

Figure 5. Transmit Timing at the Start of a Tx Burst

MCLK

READY

BIN

TxCLK

TxDATA

t

14

X

N+4

Y

N+4

X

N+5

Y

N+8

X

N+8

t

17

POWER

t

15

t

16

Figure 6. Transmit Timing at the End of a Tx Burst