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AD7013ARS Arkusz danych(PDF) 19 Page - Analog Devices |
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AD7013ARS Arkusz danych(HTML) 19 Page - Analog Devices |
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19 / 20 page ![]() REV. A AD7013 –19– I Channel ADC Noise Histogram with IRx and IRx Tied Together and Offset Register = 0; Number Codes = 1000, Standard Deviation = 4.44 Codes Q Channel ADC Noise Histogram with QRx and QRx Tied Together and Offset Register = 0; Number Codes = 1000, Standard Deviation = 3.82 Codes AD7013 Sleep Current as a Function of DxCLK Load Capacitance –30 –36 –34 –31 –32 140 0 60 20 –40 40 –41 120 80 100 –38 –39 –37 –35 –33 –29 –27 –28 –25 –26 –23 –24 –21 –22 –19 –20 –17 –18 –15 –16 –13 –14 –12 ADC CODE –30 –36 –34 –31 –32 140 0 60 20 –40 40 –41 120 80 100 –38 –39 –37 –35 –33 –29 –27 –28 –25 –26 –23 –24 –21 –22 –19 –20 –17 –18 –15 –16 –13 –14 –12 ADC CODE 50 0 200 150 100 DxCLK LOAD CAPACITANCE – pF 3 0 1.5 0.5 1 2.5 2 VAA = VDD = +5V MCLK = 6.2208 MHz CR14 = CR15 = CR16 = CR17 = 0 |
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