AD9833 datasheet(2/18 Pages) AD

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AD9833

–2–

REV PrG

PRELIMINARY TECHNICAL DATA

Parameter

Min

Typ

Max

Units

Test Conditions/Comments

SIGNAL DAC SPECIFICATIONS

Resolution

Bits

Update Rate (fMAX)

MSPS

Output Compliance

0.8

DC Accuracy:

Integral Nonlinearity

±1

LSB

Differential Nonlinearity

±0.5

LSB

DDS SPECIFICATIONS

Dynamic Specifications:

Signal to Noise Ratio

fMCLK = 25 MHz, fOUT = 1.5 kHz

Total Harmonic Distortion

-53

dBc

fMCLK = 25 MHz, fOUT = 1.5 kHz

Spurious Free Dynamic Range (SFDR):

Wideband (± 2 MHz)

dBc

fMCLK = 25 MHz, fOUT = fMCLK/3

dBc

fMCLK = 25 MHz, fOUT = 0.5 MHz

NarrowBand (± 50 kHz)

dBc

fMCLK = 25 MHz, fOUT = fMCLK/3

dBc

fMCLK = 25 MHz, fOUT = 0.5 MHz

Clock Feedthrough

–55

dBc

Wake Up Time

OUTPUT BUFFER

Output Rise/Fall Time

Using a 15 pF Load

Output Jitter

100

ps rms

When DAC data MSB is output

VOLTAGE REFERENCE

Internal Reference

1.116

1.2

1.284

1.2 V ± 7%

LOGIC INPUTS

VINH, Input High Voltage

VDD –0.9

+3.6 V to +5.5 V Power Supply

VDD - 0.5

+2.7 V to +3.6 V Power Supply

+2.3 V to + 2.7 V Power Supply

VINL, Input Low Voltage

0.9

+3.6 V to +5.5 V Power Supply

0.5

+2.3 V to + 3.6 V Power Supply

IINH, Input Current

µA

CIN, Input Capacitance

POWER SUPPLIES

fMCLK = 25 MHz, fOUT = fMCLK/7

VDD

2.3

5.5

IAA

5mA

IDD

1 + 0.04/MHz

IAA + IDD

3 V Power Supply

5 V Power Supply

Low Power Sleep Mode

0.25

DAC and Internal Clock Powered Down

NOTES

1Operating temperature range is as follows: B Version: –40°C to +85°C; typical specifications are at 25 C

2Guaranteed by Design.

3Measured with the digital inputs static and equal to 0 V or DVDD.

Specifications subject to change without notice. There is 95% test coverage of the digital circuitry.

SPECIFICATIONS1

(VDD = +2.3 V to +5.5 V; AGND = DGND = 0 V; TA = TMIN to TMAX; RSET = 6.8 k

Ω

Ω for

VOUT unless otherwise noted)

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