LTC6906 datasheet(4/28 Pages) LINER

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LTC6995-1/LTC6995-2

699512f

For more information www.linear.com/6995

elecTrical characTerisTics The

denotes the specifications which apply over the full operating

temperature range, otherwise specifications are at TA = 25°C. Test conditions are V+ = 2.25V to 5.5V, RST = 0V for LTC6995-1,

RST = V+ for LTC6995-2, DIVCODE = 0 to 15 (NDIV = 1 to 221), RSET = 50k to 800k, RLOAD = ∞, CLOAD = 5pF unless otherwise noted.

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

Digital I/O

RST Pin Input Capacitance

2.5

RST Pin Input Current

RST = 0V to V+

±10

VIH

High Level RST Pin Input Voltage

(Note 6)

0.7 • V+

VIL

Low Level RST Pin Input Voltage

(Note 6)

0.3 • V+

IOUT(MAX)

Output Output Current

V+ = 2.7V to 5.5V

±20

VOH

High Level Output Voltage (Note 7)

V+ = 5.5V

IOUT = –1mA

IOUT = –16mA

5.45

4.84

5.48

5.15

V+ = 3.3V

IOUT = –1mA

IOUT = –10mA

3.24

2.75

3.27

2.99

V+ = 2.25V

IOUT = –1mA

IOUT = –8mA

2.17

1.58

2.21

1.88

VOL

Low Level Output Voltage (Note 7)

V+ = 5.5V

IOUT = 1mA

IOUT = 16mA

0.02

0.26

0.04

0.54

V+ = 3.3V

IOUT = 1mA

IOUT = 10mA

0.03

0.22

0.05

0.46

V+ = 2.25V

IOUT = 1mA

IOUT = 8mA

0.03

0.26

0.07

0.54

tRST

Reset Propagation Delay

V+ = 5.5V

V+ = 3.3V

V+ = 2.25V

tWIDTH

Minimum Input Pulse Width

V+ = 3.3V

Output Rise Time (Note 8)

V+ = 5.5V

V+ = 3.3V

V+ = 2.25V

1.1

1.7

2.7

Output Fall Time (Note 8)

V+ = 5.5V

V+ = 3.3V

V+ = 2.25V

1.0

1.6

2.4

Note 1: Stresses beyond those listed under Absolute Maximum Ratings

may cause permanent damage to the device. Exposure to any Absolute

Maximum Rating condition for extended periods may affect device

reliability and lifetime.

Note 2: The LTC6995C is guaranteed functional over the operating

temperature range of –40°C to 85°C.

Note 3: The LTC6995C is guaranteed to meet specified performance from

0°C to 70°C. The LTC6995C is designed, characterized and expected to

meet specified performance from –40°C to 85°C but it is not tested or

QA sampled at these temperatures. The LTC6995I is guaranteed to meet

specified performance from –40°C to 85°C. The LTC6995H is guaranteed

to meet specified performance from –40°C to 125°C. The LTC6995MP is

guaranteed to meet specified performance from –55°C to 125°C.

Note 4: Frequency accuracy is defined as the deviation from the fOUT

equation, assuming RSET is used to program the frequency.

Note 5: See Operation section, Table 1 and Figure 2 for a full explanation

of how the DIV pin voltage selects the value of DIVCODE.

Note 6: The RST pin has hysteresis to accommodate slow rising or falling

signals. The threshold voltages are proportional to V+. Typical values can

be estimated at any supply voltage using VRST(RISING) ≈ 0.55 • V+ + 185mV

and VRST(FALLING) ≈ 0.48 • V+ – 155mV.

Note 7: To conform to the Logic IC Standard, current out of a pin is

arbitrarily given a negative value.

Note 8: Output rise and fall times are measured between the 10% and the

90% power supply levels with 5pF output load. These specifications are

based on characterization.

Note 9: Settling time is the amount of time required for the output to settle

within ±1% of the final frequency after a 0.5

× or 2× change in ISET.

Note 10: Jitter is the ratio of the deviation of the period to the mean of the

period. This specification is based on characterization and is not 100%

tested.

Note 11: Long-term drift of silicon oscillators is primarily due to the

movement of ions and impurities within the silicon and is tested at 30°C

under otherwise nominal operating conditions. Long-term drift is specified

as ppm/√kHr due to the typically nonlinear nature of the drift. To calculate

drift for a set time period, translate that time into thousands of hours, take

the square root and multiply by the typical drift number. For instance, a

year is 8.77kHr and would yield a drift of 266ppm at 90ppm/√kHr. Drift

without power applied to the device may be approximated as 1/10th of the

drift with power, or 9ppm/√kHr for a 90ppm/√kHr device.

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