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LG1602AXB Arkusz danych(PDF) 2 Page - Agere Systems |
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LG1602AXB Arkusz danych(HTML) 2 Page - Agere Systems |
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2 / 10 page ![]() Data Sheet LG1602 Decision Circuit February 1999 2 Lucent Technologies Inc. Pin Information 12-3223(F).ar.2 Figure 2. Pin Diagram Table 1. Pin Descriptions Pin Symbol Name/Description 2V+CLK Clock Input. May be grounded, if not used. 3V–CLK Clock Input. May be grounded, if not used. 4VSS dc Supply Voltage. 5V–OUT Negative Data Output. ac couple or terminate with 50 Ω to GND. 6V+OUT Positive Data Output. ac couple or terminate with 50 Ω to GND. 9V–REF Data Negative Reference. Bypass to GND with 0.047 µF in series with 5 Ω. 10 V–IN Negative Data Input. ac couple with 0.047 µF. 11 V+IN Positive Data Input. ac couple with 0.047 µF. 12 V+REF Data Positive Reference. Bypass to GND with 0.047 µF in series with 5 Ω. 1, 15, 16, Package Back GND Ground. For optimum performance, package back should contact board ground plane. 7, 8, 13, 14 NC No Connection. GND VSS 1 2 3 4 V+REF 12 11 10 9 16 15 14 13 GND GND NC 567 8 V–OUT V+OUT NC V+IN V–IN V–REF NC NC V+CLK V–CLK |
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