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ADP7182ACPZ-R7 Arkusz danych(PDF) 26 Page - Anachip Corp

Numer części ADP7182ACPZ-R7
Szczegółowy opis  ??8 V, ??00 mA, Low Noise, Linear Regulator
PDF  28 Pages
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Producent  ANACHIP [Anachip Corp]
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Logo ANACHIP - Anachip Corp

ADP7182ACPZ-R7 Arkusz danych(HTML) 26 Page - Anachip Corp

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ADP7182
Data Sheet
Rev. A | Page 26 of 28
Thermal Characterization Parameter, ΨJB
When the board temperature is known, use the thermal
characterization parameter, ΨJB, to estimate the junction
temperature rise (see Figure 93 and Figure 94). Maximum
junction temperature (TJ) is calculated from the board temperature
(TB) and power dissipation (PD) using the following formula:
TJ = TB + (PD × ΨJB)
(6)
The typical value of ΨJB is 18.2°C/W for the 8-lead LFCSP package
and 43°C/W for the 5 lead TSOT package.
140
120
100
80
60
40
20
0
0
7
5
6
4
3
2
1
TOTAL POWER DISSIPATION (W)
TB = 25°C
TB = 50°C
TB = 85°C
TJ MAX
Figure 93. Junction Temperature vs. Total Power Dissipation for the
8-Lead LFCSP, TA = 85°C
140
120
100
80
60
40
20
0
0
7
5
6
4
3
2
1
TOTAL POWER DISSIPATION (W)
TB = 25°C
TB = 50°C
TB = 85°C
TJ MAX
Figure 94. Junction Temperature vs. Total Power Dissipation for the
5-Lead TSOT, TA = 85°C
PCB LAYOUT CONSIDERATIONS
Place the input capacitor as close as possible to the VIN and GND
pins. Place the output capacitor as close as possible to the VOUT
and GND pins. Use of 1206 or 0805 size capacitors and resistors
achieves the smallest possible footprint solution on boards where
area is limited.
Figure 95. Example of the 8-Lead LFCSP PCB Layout
Figure 96. Example of the 5-Lead TSOT PCB Layout



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