ADE7953ACPZ datasheet(7/68 Pages) AD

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Data Sheet

ADE7953

Rev. A | Page 7 of 68

I2C Interface Timing

VDD = 3.3 V ± 10%, AGND = DGND = 0 V, on-chip reference, CLKIN = 3.58 MHz, TMIN to TMAX = −40°C to +85°C, unless otherwise noted.

Table 3.

Standard Mode

Fast Mode

Parameter

Description

Min1

Max1

Min1

Max1

Unit

fSCL

SCL clock frequency

100

400

kHz

tHD;STA

Hold time for a start or repeated start condition

4.0

0.6

μs

tLOW

Low period of SCL clock

4.7

1.3

μs

tHIGH

High period of SCL clock

4.0

0.6

μs

tSU;STA

Setup time for a repeated start condition

4.7

0.6

μs

tHD;DAT

Data hold time

3.45

0.9

μs

tSU;DAT

Data setup time

250

100

Rise time of SDA and SCL signals

1000

300

Fall time of SDA and SCL signals

300

tSU;STO

Setup time for stop condition

4.0

0.6

μs

tBUF

Bus-free time between a stop and start condition

4.7

1.3

μs

tSP

Pulse width of suppressed spikes

N/A

1 Min and max values are typical minimum and maximum values.

I2C Interface Timing Diagram

tHD;DAT

tHD;STA

tHIGH

tSU;STA

tSU;DAT

tHD;STA

tSP

tSU;STO

tBUF

tLOW

SDA

SCL

START

CONDITION

REPEATED START

CONDITION

STOP

CONDITION

START

CONDITION

Figure 3. I2C Interface Timing

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