AD7621 datasheet(16/32 Pages) AD

16 / 32 page

AD7621

Rev. 0 | Page 16 of 32

TRANSFER FUNCTIONS

Using the OB/2C digital input, the AD7621 offers two output

codings: straight binary and twos complement. The LSB size

with VREF = 2.048 V is 2 × VREF/65536, which is 62.5 μV. Refer to

Figure 22 and Table 7 for the ideal transfer characteristic.

000...000

000...001

000...010

111...101

111...110

111...111

ANALOG INPUT

+FSR–1.5 LSB

+FSR–1 LSB

–FSR+1 LSB

–FSR

–FSR+0.5 LSB

Figure 22. ADC Ideal Transfer Function

Table 7. Output Codes and Ideal Input Voltages

Digital Output Code

Description

Analog Input

VREF = 2.048 V

Straight

Binary

Twos

Complement

FSR −1 LSB

+2.047938 V

0xFFFF1

0x7FFF1

FSR − 2 LSB

+2.047875 V

0xFFFE

0x7FFE

Midscale + 1 LSB

+62.5 μV

0x8001

0x0001

Midscale

0 V

0x8000

0x0000

Midscale − 1 LSB

−62.5 μV

0x7FFF

0xFFFF

−FSR + 1 LSB

−2.047938 V

0x0001

0x8001

−FSR

−2.048 V

0x00002

0x80002

1 This is also the code for overrange analog input (VIN+ − VIN− above

VREF − VREFGND).

2 This is also the code for underrange analog input (VIN+ − VIN− below

−VREF + VREFGND).

100nF

AVDD

μF

100nF

AGND

DGND

DVDD

OVDD

OGND

CNVST

BUSY

SDOUT

SCLK

RESET

REFBUFIN

CLOCK

AD7621

MICROCONVERTER/

MICROPROCESSOR/

DSP

SERIAL

PORT

DIGITAL

INTERFACE

SUPPLY

(2.5V OR 3.3V)

ANALOG

SUPPLY (2.5V)

OVDD

WARP

DIGITAL

SUPPLY (2.5V)

IN+

IN–

NOTE 5

50pF

NOTE 1

ANALOG

INPUT +

1nF

NOTE 1

SER/PAR

OB/2C

REFGND

REF

PDBUF

PDREF

100nF

ANALOG

INPUT –

NOTE 2

NOTE 3

NOTE 4

NOTE 3

NOTE 7

NOTE 6

IMPULSE

μF

CREF

μF

10k

50pF

1. SEE ANALOG INPUT SECTION.

2. THE AD8021 IS RECOMMENDED. SEE DRIVER AMPLIFIER CHOICE SECTION.

3. THE CONFIGURATION SHOWN IS USING THE INTERNAL REFERENCE. SEE VOLTAGE REFERENCE INPUT SECTION.

4. A 10

μF CERAMIC CAPACITOR (X5R, 1206 SIZE) IS RECOMMENDED (e.g., PANASONIC ECJ3YB0J106M).

SEE VOLTAGE REFERENCE INPUT SECTION.

5. OPTION, SEE POWER SUPPLY SECTION.

6. OPTION, SEE POWER UP SECTION.

7. OPTIONAL LOW JITTER CNVST, SEE CONVERSION CONTROL SECTION.

Figure 23. Typical Connection Diagram

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