ADR360BUJZ-R2 datasheet(17/20 Pages) AD

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ADR360/ADR361/ADR363/ADR364/ADR365/ADR366

Rev. D | Page 17 of 20

APPLICATIONS INFORMATION

BASIC VOLTAGE REFERENCE CONNECTION

The circuit in Figure 33 illustrates the basic configuration for

the ADR36x family. Decoupling capacitors are not required for

circuit stability. The ADR36x family is capable of driving

capacitive loads from 0 μF to 10 μF. However, a 0.1 μF ceramic

output capacitor is recommended to absorb and deliver the

charge, as is required by a dynamic load.

GND

VIN

ADR36x

TRIM

VOUT

INPUT

0.1µF

OUTPUT

0.1µF

Figure 33. Basic Configuration for the ADR36x Family

Stacking Reference ICs for Arbitrary Outputs

Some applications require two reference voltage sources, which

are a combined sum of standard outputs. Figure 34 shows how

this stacked output reference can be implemented.

GND

VIN

ADR36x

TRIM

VOUT

VOUT2

VOUT1

VIN

0.1µF

Figure 34. Stacking Voltage References with the ADR36x

Two reference ICs are used and fed from an unregulated input,

VIN. The outputs of the individual ICs are connected in series,

which provides two output voltages, VOUT1 and VOUT2. VOUT1 is

the terminal voltage of U1, and VOUT2 is the sum of this voltage

and the terminal voltage of U2. U1 and U2 are chosen for the

two voltages that supply the required outputs (see Table 10). For

example, if both U1 and U2 are ADR361s, VOUT1 is 2.5 V and

VOUT2 is 5.0 V.

Table 10. Output

U1/U2

VOUT1 (V)

VOUT2 (V)

ADR361/ADR365

2.5

7.5

ADR361/ADR361

2.5

5.0

ADR365/ADR361

7.5

Negative Precision Reference Without Precision

Resistors

A negative reference is easily generated by adding an op amp,

A1 (see Figure 35). VOUTF and VOUTS are at virtual ground and

therefore the negative reference can be taken directly from the

output of the op amp. The op amp must be dual-supply, low

offset, and rail-to-rail if the negative supply voltage is close to

the reference output.

GND

VIN

ADR36x

TRIM

VOUT

–

–VREF

–VDD

+VDD

Figure 35. Negative Reference

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