HT24LC02A datasheet(5/11 Pages) HOLTEK

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HT24LC02A

Rev. 1.00

January 29, 2013

· Page write

The 2K EEPROM is capable of an 8-byte page write.

A page write is initiated the same as byte write, but the

microcontroller does not send a stop condition after

the first data word is clocked in. Instead, after the

EEPROM acknowledges the receipt of the first data

word, the microcontroller can transmit up to seven

more data words. The EEPROM will respond with a

zero after each data word received. The

microcontroller must terminate the page write se-

quence with a stop condition.

The data word address lower three (2K) bits are inter-

nally incremented following the receipt of each data

word. The higher data word address bits are not incre-

mented, retaining the memory page row location (re-

fer to Page write timing).

· Acknowledge polling

To maximise bus throughput, one technique is to allow

the master to poll for an acknowledge signal after the

start condition and the control byte for a write com-

mand have been sent. If the device is still busy imple-

menting its write cycle, then no ACK will be returned.

The master can send the next read/write command

when the ACK signal has finally been received.

· Write protect

The HT24LC02A has a write-protect function and pro-

gramming will then be inhibited when the WP pin is

connected to VCC. Under this mode, the HT24LC02A

is used as a serial ROM.

· Read operations

The HT24LC02A supports three read operations,

namely, current address read, random address read

and sequential read. During read operation execution,

the read/write select bit should be set to

²1².

· Current address read

The internal data word address counter maintains the

last address accessed during the last read or write op-

eration, incremented by one. This address stays valid

between operations as long as the chip power is main-

tained. The address roll over during read from the last

byte of the last memory page to the first byte of the first

page. The address roll over during write from the last

byte of the current page to the first byte of the same

page. Once the device address with the read/write se-

lect bit set to one is clocked in and acknowledged by

the EEPROM, the current address data word is seri-

ally clocked out. The microcontroller should respond a

No ACK (High) signal and following stop condition (re-

fer to Current read timing).

R / W

D e v i c e a d d r e s s

W o r d a d d r e s s

D A T A

A C K

S t o p

S t a r t

S D A

A C K

B y t e W r i t e T i m i n g

D e v i c e a d d r e s s

W o r d a d d r e s s

D A T A n

A C K

S t o p

S t a r t

S D A

A C K

D A T A n + 1

D A T A n + x

P a g e W r i t e T i m i n g

D e v i c e a d d r e s s

D A T A

A C K

S t o p

S t a r t

S D A

N o A C K

C u r r e n t R e a d T i m i n g

S e n d W r i t e C o m m a n d

S e n d S t o p C o n d i t i o n

t o I n i t i a t e W r i t e C y c l e

S e n d S t a r t

S e n d C o t r o l l B y t e

w i t h R / W = 0

( A C K = 0 ) ?

N e x t O p e r a t i o n

N o

Y e s

Acknowledge Polling Flow

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