MPC5534MVM80 datasheet(39/60 Pages) FREESCALE

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Electrical Characteristics

MPC5534 Microcontroller Data Sheet, Rev. 6

Freescale Semiconductor

3.13.7

eMIOS Timing

Figure 17. eMIOS Timing

3.13.8

DSPI Timing

Table 25. eMIOS Timing 1

1 eMIOS timing specified at: V

DDEH = 3.0–5.25 V and TA = TL to TH.

Spec

Characteristic

Symbol

Min.

Max.

Unit

eMIOS input pulse width

tMIPW

4—

tCYC

eMIOS output pulse width

tMOPW

1 2

2 This specification does not include the rise and fall times. When calculating the minimum eMIOS pulse width, include the rise

and fall times defined in the slew rate control field (SRC) in the pad configuration register (PCR).

—tCYC

Table 26. DSPI Timing 1, 2

Spec

Characteristic

Symbol

40 MHz

66 MHz

80 MHz

Unit

Min.

Max

Min.

Max

Min.

Max

SCK cycle time 3, 4

tSCK

48.8 ns

5.8 ms

28.4 ns

3.5 ms

24.4 ns

2.9 ms

—

PCS to SCK delay5

tCSC

—26

—

—ns

After SCK delay6

tASC

—25

—

—ns

SCK duty cycle

tSDC

(tSCK  2)

– 2 ns

(tSCK  2)

+ 2 ns

(tSCK  2)

– 2 ns

(tSCK  2)

+ 2 ns

(tSCK  2)

– 2 ns

(tSCK  2)

+ 2 ns

Slave access time

(SS active to SOUT driven)

—

Slave SOUT disable time

(SS inactive to SOUT Hi-Z, or

invalid)

tDIS

—

7PCSx to PCSS time

tPCSC

—4

—

—ns

eMIOS

output

eMIOS input

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