STA335W datasheet(37/43 Pages) STMICROELECTRONICS

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STA335W

Application

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Application

6.1

Application scheme for power supplies

Here in the next figure the typical application scheme for STA335W concerning the power

supplies. A particular care has to be devoted to the layout of the PCB. In particular all the

decoulpling capacitors have to be put as much as possible closed to the device to limit

spikes on all the supplies.

Figure 9.

Application scheme for power supplies

6.2

PLL filter schematic

It is recommended to use the above scheme and values for the PLL loop filter to achieve the

best performances from the device in general application. Please be noted that the ground

of this filter scheme has to be connected to the ground of the PLL without any resistive path.

Concerning the component values, please take into account that the greater is the filter

bandwidth, the less is the lock time but the higher is the PLL output jitter.

6.3

Typical output configuration

Here after the typical output configuration used for BTL stereo mode. Please refer to the

application note for all the other possible output configuration recommended schematics.

STA335W Arkusz danych(PDF) 37 Page - STMicroelectronics