STM8AF5269 datasheet(20/110 Pages) STMICROELECTRONICS

20 / 110 page

Product overview

STM8AF52/62xx, STM8AF51/61xx

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Doc ID 14395 Rev 9

5.6

Low-power operating modes

For efficient power management, the application can be put in one of four different low-

power modes. You can configure each mode to obtain the best compromise between lowest

power consumption, fastest start-up time and available wakeup sources.

●

Wait mode

In this mode, the CPU is stopped but peripherals are kept running. The wakeup is

performed by an internal or external interrupt or reset.

●

Active-halt mode with regulator on

In this mode, the CPU and peripheral clocks are stopped. An internal wakeup is

generated at programmable intervals by the auto wake up unit (AWU). The main

voltage regulator is kept powered on, so current consumption is higher than in Active-

halt mode with regulator off, but the wakeup time is faster. Wakeup is triggered by the

internal AWU interrupt, external interrupt or reset.

●

Active-halt mode with regulator off

This mode is the same as Active-halt with regulator on, except that the main voltage

regulator is powered off, so the wake up time is slower.

●

Halt mode

CPU and peripheral clocks are stopped, the main voltage regulator is powered off.

Wakeup is triggered by external event or reset.

In all modes the CPU and peripherals remain permanently powered on, the system clock is

applied only to selected modules. The RAM content is preserved and the brown-out reset

circuit remains activated.

Table 7.

Peripheral clock gating bits (CLK_PCKENR2)

Control bit

Peripheral

PCKEN27

CAN

PCKEN26

Reserved

PCKEN25

Reserved

PCKEN24

Reserved

PCKEN23

ADC

PCKEN22

AWU

PCKEN21

Reserved

PCKEN20

Reserved

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