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PCF8564A_1308 Arkusz danych(PDF) 8 Page - NXP Semiconductors

Numer części PCF8564A_1308
Szczegółowy opis  Real time clock and calendar
PDF  48 Pages
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Producent  NXP [NXP Semiconductors]
Strona internetowa  http://www.nxp.com
Logo NXP - NXP Semiconductors

PCF8564A_1308 Arkusz danych(HTML) 8 Page - NXP Semiconductors

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PCF8564A
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© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 3 — 26 August 2013
8 of 48
NXP Semiconductors
PCF8564A
Real time clock and calendar
8.3.2.1
Interrupt output
Bits TF and AF: When an alarm occurs, AF is set to 1. Similarly, at the end of a timer
countdown, TF is set to 1. These bits maintain their value until overwritten by command. If
both timer and alarm interrupts are required in the application, the source of the interrupt
can be determined by reading these bits. To prevent one flag being overwritten while
clearing another, a logic AND is performed during a write access.
Bits TIE and AIE: These bits activate or deactivate the generation of an interrupt when
TF or AF is asserted respectively. The interrupt is the logical OR of these two conditions
when both AIE and TIE are set.
Countdown timer interrupts: The pulse generator for the countdown timer interrupt uses
an internal clock and is dependent on the selected source clock for the countdown timer
and on the countdown value TV. As a consequence, the width of the interrupt pulse varies
(see Table 8).
[1]
TF and INT become active simultaneously.
[2]
TV = loaded countdown value. Timer is stopped when TV = 0.
When bits TIE and AIE are disabled, pin INT will remain high-impedance.
Fig 3.
Interrupt scheme
Table 8.
INT operation (bit TI_TP = 1)[1]
Source clock (Hz)
INT period (s)
TV = 1[2]
TV > 1
4096
18192
14096
64
1128
164
1
164
164
160
164
164



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