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ADRF6704 Arkusz danych(PDF) 21 Page - Analog Devices

Numer części ADRF6704
Szczegółowy opis  1200 MHz to 2400 MHz Quadrature Modulator
PDF  36 Pages
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ADRF6704 Arkusz danych(HTML) 21 Page - Analog Devices

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Data Sheet
ADRF6702
Rev. B | Page 21 of 36
REGISTER DESCRIPTION
REGISTER 0—INTEGER DIVIDE CONTROL
(DEFAULT: 0x0001C0)
With Register 0, Bits[2:0] set to 000, the on-chip integer divide
control register is programmed as shown in Figure 41.
Divide Mode
Divide mode determines whether fractional mode or integer
mode is used. In integer mode, the RF VCO output frequency
(fVCO) is calculated by
fVCO = 2 × fPFD × (INT)
(1)
where:
fVCO is the output frequency of the internal VCO.
fPFD is the frequency of operation of the phase-frequency detector.
INT is the integer divide ratio value (21 to 123 in integer mode).
Integer Divide Ratio
The integer divide ratio bits are used to set the integer value in
Equation 2. The INT, FRAC, and MOD values make it possible
to generate output frequencies that are spaced by fractions of
the PFD frequency. The VCO frequency (fVCO) equation is
fVCO = 2 × fPFD × (INT + (FRAC/MOD))
(2)
where:
INT is the preset integer divide ratio value (24 to 119 in
fractional mode).
MOD is the preset fractional modulus (1 to 2047).
FRAC is the preset fractional divider ratio value (0 to MOD − 1).
DIVIDE
MODE
DB23 DB22 DB21 DB20 DB19 DB18 DB17 DB16 DB15 DB14 DB13 DB12 DB11
DB10
DB9
DB8
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
000
0000
000
000
DM
ID6
ID5
ID4
ID3
ID2
ID1
ID0
C3(0) C2(0) C1(0)
DM
0
1
ID6
ID5
ID4
ID3
ID2
ID1
ID0
0
0
101
0
1
0
0
101
1
0
0
0
101
1
1
0
0
110
0
0
...
...
...
...
...
...
...
...
...
...
...
...
...
...
0
1
110
0
0
...
...
...
...
...
...
...
...
...
...
...
...
...
...
1
1
101
1
1
1
1
110
0
0
1
1
110
0
1
1
1
110
1
0
1
1
110
1
1
...
...
119
120 (INTEGER MODE ONLY)
INTEGER DIVIDE RATIO
21 (INTEGER MODE ONLY)
22 (INTEGER MODE ONLY)
23 (INTEGER MODE ONLY)
24
...
...
56 (DEFAULT)
INTEGER
INTEGER DIVIDE RATIO
CONTROL BITS
DIVIDE MODE
FRACTIONAL (DEFAULT)
121 (INTEGER MODE ONLY)
122 (INTEGER MODE ONLY)
123 (INTEGER MODE ONLY)
RESERVED
Figure 41. Register 0—Integer Divide Control Register Map



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