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LTC1778/LTC1778-1

1778fb

APPLICATIO S I FOR ATIO

CIN is chosen for an RMS current rating of about 5A at

85°C. The output capacitors are chosen for a low ESR of

0.013Ω to minimize output voltage changes due to induc-

tor ripple current and load steps. The ripple voltage will be

only:

∆VOUT(RIPPLE) = ∆IL(MAX) (ESR)

= (5.1A) (0.013Ω) = 66mV

However, a 0A to 10A load step will cause an output

change of up to:

∆VOUT(STEP) = ∆ILOAD (ESR) = (10A) (0.013Ω) = 130mV

An optional 22µF ceramic output capacitor is included to

minimize the effect of ESL in the output ripple. The

complete circuit is shown in Figure 9.

PC Board Layout Checklist

When laying out a PC board follow one of the two sug-

gested approaches. The simple PC board layout requires

a dedicated ground plane layer. Also, for higher currents,

it is recommended to use a multilayer board to help with

heat sinking power components.

Figure 9. Design Example: 2.5V/10A at 250kHz

RUN/SS

PGOOD

VRNG

FCB

ITH

SGND

ION

VFB

BOOST

PGND

INTVCC

VIN

EXTVCC

LTC1778

Si4874

Si4884

1.8µH

B340A

COUT1-2

180µF

×2

COUT3

22µF

6.3V

X7R

CIN

10µF

35V

×3

VIN

5V TO 28V

VOUT

2.5V

10A

CSS

0.1µF

CC1

500pF

CC2

100pF

6.8nF

CVCC

4.7µF

0.1µF

0.22µF

20k

14.0k

RON

1.4MΩ

30.1k

1Ω

CMDSH-3

1778 F09

CIN: UNITED CHEMICON THCR60EIHI06ZT

COUT1-2: CORNELL DUBILIER ESRE181E04B

L1: SUMIDA CEP125-1R8MC-H

RPG

100k

11k

39k

• The ground plane layer should not have any traces and

it should be as close as possible to the layer with power

MOSFETs.

• Place CIN, COUT, MOSFETs, D1 and inductor all in one

compact area. It may help to have some components on

the bottom side of the board.

• Place LTC1778 chip with pins 9 to 16 facing the power

components. Keep the components connected to pins

1 to 8 close to LTC1778 (noise sensitive components).

• Use an immediate via to connect the components to

ground plane including SGND and PGND of LTC1778.

Use several bigger vias for power components.

• Use compact plane for switch node (SW) to improve

cooling of the MOSFETs and to keep EMI down.

• Use planes for VIN and VOUT to maintain good voltage

filtering and to keep power losses low.

• Flood all unused areas on all layers with copper. Flood-

ing with copper will reduce the temperature rise of

power component. You can connect the copper areas to

any DC net (VIN, VOUT, GND or to any other DC rail in

your system).

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