SP6644 datasheet(11/15 Pages) SIPEX

11 / 15 page

Date: 11/30/04

SP6644/6645 High Efficiency Boost Regulator

With an external resistor tolerance of +1%, the

peak current tolerance will be +6%. To make

sure that the SP6644/6645 internal circuitry

adequately controls the inductor current, it is

recommended that values equal to or greater

than 22

µH (+10%) be used.

The SP6644/6645 devices control algorithm

delivers an average maximum load current in

regulation as defined by:

where I

LOAD-MAX [A] is the maximum load current,

E is the efficiency factor (generally between 0.8

and 0.9), I

PEAK [A] is the programmed peak

inductor current, V

BATT [V] is the input voltage to

the device, and V

OUT [V] is the output voltage.

Given the minimum input voltage, output voltage,

and maximum average load current, the value of

PEAK can be solved for and an appropriate inductor

can be chosen. It is good design practice to use

the

lowest

peak

current

possible

reduce possible EMI and output ripple voltage.

A closed-core inductor, such as a toroid or

shielded bobbin, will minimize any fringe

magnetic fields or EMI.

Figure 28. Adjustable Output Voltage Circuitry

APPLICATION NOTES

Printed circuit board layout is a critical part of

design. Poor designs can result in excessive EMI

on the voltage gradients and feedback paths on

the ground planes with applications involving

high switching frequencies and large peak

currents. Excessive EMI can result in instability

or regulation errors.

All power components should be placed on the

PC board as closely as possible with the traces

kept short, direct, and wide (>50mils or 1.25mm).

Extra copper on the PC board should be integrated

into ground as a pseudo-ground plane. On a

multilayer PC board, route the star ground using

component-side copper fill, then connect it to the

internal ground plane using vias.

For the SP6644/6645 devices, the inductor and

input and output filter capacitors should

be soldered with their ground pins as close

together as possible in a star-ground

configuration. The V

OUT pin must be bypassed

directly to ground as close to the SP6644/6645

devices as possible (within 0.2in or 5mm). The

DC-DC converter and any digital circuitry should

be placed on the opposite corner of the PC board

as far away from sensitive RF and analog input

stages. The external voltage-feedback network

should be placed very close to the FB pin as well

as the R

LIM resistor (within 0.2in or 5mm). Any

GND

VOUT

VBATT

47µF

0.1µF

22µF

RLIM

VOUT=

2V to 5.2V

SHDN

0.88V to

3.3V Input

SP6644

SP6645

100pF*

*optional compensation

22µH

0.7A

BATTLO

LOAD-MAX =

E x I

PEAK x VBATT

2 x V

OUT

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