| Zakładka z wyszukiwarką danych komponentów |
|
ADD5207ACPZ Arkusz danych(PDF) 14 Page - Analog Devices |
|
|
|||||||||||||||||||||||||||||
ADD5207ACPZ Arkusz danych(HTML) 14 Page - Analog Devices |
|
14 / 16 page ![]() ADD5207 Data Sheet Rev. A | Page 14 of 16 The grounds of the IC, input capacitors, output capacitors, and output diode (if applicable), should be connected close together, and directly to a ground plane. It is also a good idea to have a ground plane on both sides of the PCB. This reduces noise by reducing ground loop errors and by absorbing more of the EMI radiated by the inductor. For multilayer boards of more than two layers, a ground plane can be used to separate the power plane (power traces and com- ponents) and the signal plane (feedback, compensation, and components) for improved performance. On multilayer boards, the use of vias is required to connect traces and different planes. If a trace needs to conduct a significant amount of current from one plane to the other, it is good practice to use one standard via per 200 mA of current. Arrange the components so that the switching current loops curl in the same direction. Due to how switching regulators operate, there are two power states: one state when the switch is on, and one when the switch is off. During each state, there is a current loop made by the power components currently conducting. Place the power components so that the current loop is conducting in the same direction during each of the two states. This prevents magnetic field reversal caused by the traces between the two half cycles and reduces radiated EMI. Layout Procedure To achieve high efficiency, good regulation, and stability, a good PCB layout is required. It is recommended that the reference board layout be followed as closely as possible because it is already optimized for high efficiency and low noise. Use the following general guidelines when designing PCBs: • Keep CIN close to the VIN and GND leads of the ADD5207. • Keep the high current path from CIN (through L1) to the SW and GND leads as short as possible. • Keep the high current path from CIN (through L1), D1, and COUT as short as possible. • Keep high current traces as short and as wide as possible. • Keep nodes connected to SW away from sensitive traces, such as COMP, to prevent coupling of the traces. If such traces must be run near each other, place a ground trace between the two as a shield. • Place the compensation components as close as possible to the COMP pin. • Place the LED current setting resistors as close as possible to each pin to prevent noise pickup. • Avoid routing noise-sensitive traces near high current traces and components, especially the LED current setting node (ISET). • Use a thermal pad size that is the same dimension as the exposed pad on the bottom of the package. Heat Sinking When using a surface-mount power IC or external power switches, the PCB can often be used as the heat sink. This is done by using the copper area of the PCB to transfer heat from the device. Users should maximize this area to optimize thermal performance. |
|
|
Link URL |
| Czy Alldatasheet okazała się pomocna? [ DONATE ] |
O Alldatasheet | Reklama | Kontakt | Polityka prywatności | Link do karty katalogowej | Linki | Lista producentów All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |