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25LC080 Arkusz danych(PDF) 10 Page - Microchip Technology

Numer części 25LC080
Szczegółowy opis  8K SPI Bus Serial EEPROM
PDF  22 Pages
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Producent  MICROCHIP [Microchip Technology]
Strona internetowa  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

25LC080 Arkusz danych(HTML) 10 Page - Microchip Technology

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25AA080/25LC080/25C080
DS21230D-page 10
 2004 Microchip Technology Inc.
3.5
Read Status Register (RDSR)
The Read Status Register (RDSR) instruction provides
access to the Status register. The Status register may
be read at any time, even during a write cycle. The
Status register is formatted as follows:
The Write-In-Process (WIP) bit indicates whether the
25XX080 is busy with a write operation. When set to a
1’, a write is in progress, when set to a ‘0’, no write is
in progress. This bit is read-only.
The Write Enable Latch (WEL) bit indicates the status
of the write enable latch. When set to a ‘1’, the latch
allows writes to the array, when set to a ‘0’, the latch
prohibits writes to the array. The state of this bit can
always be updated via the WREN or WRDI commands
regardless of the state of write protection on the Status
register. This bit is read only.
The Block Protection (BP0 and BP1) bits indicate
which blocks are currently write-protected. These bits
are set by the user issuing the WRSR instruction. These
bits are nonvolatile.
See Figure 3-6 for the RDSR timing sequence.
FIGURE 3-6:
READ STATUS REGISTER TIMING SEQUENCE
7
654
3
2
1
0
WPEN
X
X
X
BP1
BP0
WEL
WIP
SO
SI
CS
9
1011
12131415
11
0
0
0
0
00
76
5
4
2
1
0
instruction
data from Status register
High-impedance
SCK
0
2
34
56
7
18
3



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