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MP8652 Arkusz danych(PDF) 4 Page - Monolithic Power Systems |
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MP8652 Arkusz danych(HTML) 4 Page - Monolithic Power Systems |
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4 / 14 page ![]() MP8652 – 15A, 14V, HIGH FREQUENCY STEP-DOWN WITH SYNCHRONOUS GATE DRIVER MP8652 Rev. 0.9 www.MonolithicPower.com 4 10/26/2009 MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2009 MPS. All Rights Reserved. PIN FUNCTIONS Pin # Name Description 1 VCC BG Driver Bias Supply. Decouple with a 1µF ceramic capacitor. 2 SYNCOUT Timing output to drive another MP8652 (or similar device) SYNCIN for phase-shift operation. 3 SYNCIN External Frequency Synchronization. Connect to VCC for 400KHz fixed switching frequency. 4 EN On/Off Control. 5 SS/TRK Soft-Start/Track Input. Connect a capacitor to ground. 6 FB Feedback. An external resistor divider from the output to GND, tapped to the FB pin, sets the output voltage. To prevent current limit run away during a short circuit fault condition the frequency foldback comparator lowers the oscillator frequency when the FB voltage is below 400mV. 7 COMP Compensation. Connect R/C network to ground. 8 PG Power Good Indicator. Connect this pin to VCC or VOUT by a 100kΩ pull-up resistor. The output of this pin is an open drain if the output voltage is within 10% of the nominal voltage, otherwise it is LOW. If PG is initially at open drain, there is a 20µs delay to pull PG if the output voltage is less than 10% regulation window. 9 BST Bootstrap. This capacitor is needed to drive the power switch’s gate above the supply voltage. It is connected between SW and BS pins to form a floating supply across the power switch driver. 10, 18, Exposed Pad VIN Supply Voltage. The MP8652 operates from a +4.5V to +14V unregulated input. C1 is needed to prevent large voltage spikes from appearing at the input. 11-17 SW Switch Output. These pins are fused together. 19 GATE Gate Driver Output. Connect this pin to the synchronous MOSFET. 20 GND Ground. |
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