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STM8S005C6T6C Arkusz danych(PDF) 61 Page - STMicroelectronics |
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STM8S005C6T6C Arkusz danych(HTML) 61 Page - STMicroelectronics |
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61 / 103 page ![]() (1) Data based on characterization results, not tested in production. (2) Configured by the REGAH bit in the CLK_ICKR register. (3) Configured by the AHALT bit in the FLASH_CR1 register. Total current consumption in halt mode 9.3.2.4 Table 25: Total current consumption in halt mode at VDD = 5 V Unit Max at 85 °C (1) Typ Conditions Parameter Symbol µA 90 62 Flash in operating mode, HSI clock after wakeup Supply current in halt mode IDD(H) 25 6.5 Flash in powerdown mode, HSI clock after wakeup (1) Data based on characterization results, not tested in production. Table 26: Total current consumption in halt mode at VDD = 3.3 V Unit Max at 85 °C (1) Typ Conditions Parameter Symbol µA 90 60 Flash in operating mode, HSI clock after wakeup Supply current in halt mode IDD(H) 20 4.5 Flash in powerdown mode, HSI clock after wakeup (1) Data based on characterization results, not tested in production. Low power mode wakeup times 9.3.2.5 Table 27: Wakeup times Unit Max (1) Typ Conditions Parameter Symbol μs See note (2) 0 to 16 MHz Wakeup time from wait mode to run tWU(WFI) 0.56 fCPU = fMASTER = 16 MHz mode (3) 61/103 DocID022186 Rev 3 Electrical characteristics STM8S005K6 STM8S005C6 |
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