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Zakładka z wyszukiwarką danych komponentów |
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Zakładka z wyszukiwarką danych komponentów |
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STM8S103F2 Arkusz danych(PDF) 87 Page - STMicroelectronics |
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STM8S103F2 Arkusz danych(HTML) 87 Page - STMicroelectronics |
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87 / 117 page  Table 45: ADC characteristics Unit Max Typ Min Conditions Parameter Symbol MHz 4 - 1 VDD =2.95 to 5.5 V ADC clock frequency fADC 6 - 1 VDD =4.5 to 5.5 V V VDD - VSS Conversion voltage range (1) VAIN pF - 3 - Internal sample and hold capacitor CADC μs - 0.75 - fADC = 4 MHz Minimum sampling time tS (1) - 0.5 - fADC = 6 MHz μs - 7 - Wake-up time from standby tSTAB μs 3.5 fADC = 4 MHz Minimum total conversion time (including sampling time, 10-bit resolution) tCONV μs 2.33 fADC = 6 MHz 1/fADC 14 (1) During the sample time the input capacitance C AIN (3 pF max) can be charged/discharged by the external source. The internal resistance of the analog source must allow the capacitance to reach its final voltage level within tS. After the end of the sample time tS, changes of the analog input voltage have no effect on the conversion result. Values for the sample clock tS depend on programming. Table 46: ADC accuracy with RAIN < 10 kΩ , VDD= 5 V Unit Max (1) Typ Conditions Parameter Symbol LSB 3.5 1.6 fADC = 2 MHz Total unadjusted error (2) |ET| 4 2.2 fADC = 4 MHz 4.5 2.4 fADC = 6 MHz 2.5 1.1 fADC = 2 MHz Offset error (2) |EO| 87/117 DocID15441 Rev 9 Electrical characteristics STM8S103K3 STM8S103F3 STM8S103F2 |
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