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TLC32046MFKB Arkusz danych(PDF) 15 Page - Texas Instruments |
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TLC32046MFKB Arkusz danych(HTML) 15 Page - Texas Instruments |
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15 / 56 page ![]() 2–1 2 Detailed Description Table 2–1. Mode-Selection Function Table DATA-DR/ CONTROL (Terminal 13) FSD/ WORD-BYTE (Terminal 1) CONTROL REGISTER BIT (D5) OPERATING MODE SERIAL CONFIGURATION DESCRIPTION Data in (0 V to 5 V) FSD out (0 V to 5 V) 1 Dual Word (Telephone Interface) Synchronous, One 16-Bit Word Terminal functions DATA-DR†, FSD†, D11OUT, and D10OUT are applicable in this configuration. FSD is asserted during secondary communication, but FSR is not asserted. However, FSD remains high during primary communication. Data in (0 V to 5 V) FSD out (0 V to 5 V) 0 Dual Word (Telephone Interface) Synchronous, One 16-Bit Word Terminal functions DATA-DR †, FSD†, D11OUT, and D10OUT are applicable in this configuration. FSD is asserted during secondary communication, but FSR is not asserted. However, FSD remains high during primary communication. If secondary communications occur while the A/D conversion is being transmitted from DR, FSD cannot go low, and data from DATA-DR cannot go onto DR. VCC 1 WORD Synchronous, One 16-Bit Word Terminal functions CONTROL†, WORD-BYTE†, EODR, and EODX are applicable in this configuration. VCC VCC + 0 WORD Asynchronous, One 16-bit Word Terminal functions CONTROL†, WORD-BYTE†, EODR, and EODX are applicable in this configuration. VCC – VCC 1 BYTE Synchronous, Two 8-Bit Bytes Terminal functions CONTROL†, WORD-BYTE†, EODR, and EODX are applicable in this configuration. VCC – 0 BYTE Asynchronous, Two 8-Bit Bytes Terminal functions CONTROL†, WORD-BYTE†, EODR, and EODX are applicable in this configuration. † DATA-DR/CONTROL has an internal pulldown resistor to – 5 V, and FSD/WORD-BYTE has an internal pullup resistor to 5 V. |
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