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AS1363 Arkusz danych(PDF) 2 Page - ams AG |
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AS1363 Arkusz danych(HTML) 2 Page - ams AG |
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2 / 19 page ![]() www.ams.com/LDO Revision 1.9 2 - 19 AS1363 Datasheet - Pin Assignm ents 4 Pin Assignments Figure 2. Pin Assignments (Top View) 4.1 Pin Descriptions Table 2. Pin Descriptions Pin Number Pin Name Description 1IN +2.0V to +5.5V Supply Voltage. Bypass this pin with a 1µF capacitor to GND (see Package Drawings and Markings on page 16). 2POK Open-Drain POK Output. POK remains low while VOUT is below the POK threshold. Connect a 100k pull-up resistor from this pin to OUT to obtain an output voltage (see Figure on page 1). 3EN Active-High Enable Input. A logic low reduces supply current below 30nA. In shutdown mode, the POK output is low, and OUT is high impedance. Connect this pin to IN for normal operation. 4 GND Ground 5 SET Voltage-Setting Input. Connect to GND for preset output or Connect to a resistive voltage- divider between OUT and GND to set the output voltage between 1.2V and 5.3V (see Figure on page 1). BYP Bypass Pin. Connect a 10nF capacitor from this pin to VOUT to improve PSRR and noise performance (see Figure 16 on page 9). 6OUT Output. Sources up to 500mA. Bypass this pin with a 2.2µF low-ESR capacitor to GND (see Figure on page 1). Note: For output voltages below 2V a 4.7µF capacitor should be used. 3 EN 2 POK 1 IN 4GND 5 SET/BYP 6OUT AS1363 |
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