XC61C1001PR datasheet(5/17 Pages) TOREX

5 / 17 page

5/17

XC61C

Series

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OPERATIONAL EXPLANATION

(Especially prepared for CMOS output products)

①

When input voltage (VIN) rises above detect voltage (VDF), output voltage (VOUT) will be equal to VIN.

(A condition of high impedance exists with N-ch open drain output configurations.)

②

When input voltage (VIN) falls below detect voltage (VDF), output voltage (VOUT) will be equal to the ground voltage

(VSS) level.

③

When input voltage (VIN) falls to a level below that of the minimum operating voltage (VMIN), output will become

unstable. In this condition, VIN will equal the pulled-up output (should output be pulled-up.)

④

When input voltage (VIN) rises above the ground voltage (VSS) level, output will be unstable at levels below the

minimum operating voltage (VMIN). Between the VMIN and detect release voltage (VDR) levels, the ground voltage (VSS)

level will be maintained.

⑤

When input voltage (VIN) rises above detect release voltage (VDR), output voltage (VOUT) will be equal to VIN.

(A condition of high impedance exists with N-ch open drain output configurations.)

⑥

The difference between VDR and VDF represents the hysteresis range.

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Timing Chart

XC61C1001PR Arkusz danych(PDF) 5 Page - Torex Semiconductor