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OPA830 Arkusz danych(PDF) 21 Page - National Semiconductor (TI) |
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OPA830 Arkusz danych(HTML) 21 Page - National Semiconductor (TI) |
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21 / 37 page ![]() OPA830 SBOS263F − AUGUST 2004 − REVISED AUGUST 2008 www.ti.com 21 OPA830 325 Ω 528 Ω 78.7 Ω 650 Ω +5V 845 Ω 1.87k Ω V O 22 µF 47 µF 75 Ω Video DAC 75 Ω Load Figure 5. Video Line Driver with SAG Correction The input is shifted slightly positive in Figure 5 using the voltage divider from the positive supply. This gives about a 200mV input DC offset that will show up at the output pin as a 400mV DC offset when the DAC output is at zero current during the sync tip portion of the video signal. This acts to hold the output in its linear operating region. This will pass on any power-supply noise to the output with a gain of approximately −20dB, so good supply decoupling is recommended on the power-supply pin. Figure 6 shows the frequency response for the circuit of Figure 5. This plot shows the 8Hz low-frequency high-pass pole and a high-end cutoff at approximately 100MHz. 3 0 −3 −6 −9 −12 −15 −18 −21 Frequency (Hz) 110 102 103 104 105 106 107 108 109 Figure 6. Video Line Driver Response to Matched Load NONINVERTING AMPLIFIER WITH REDUCED PEAKING Figure 7 shows a noninverting amplifier that reduces peaking at low gains. The resistor RC compensates the OPA830 to have higher Noise Gain (NG), which reduces the AC response peaking (typically 5dB at G = +1 without RC) without changing the DC gain. VIN needs to be a low impedance source, such as an op amp. The resistor values are low to reduce noise. Using both RT and RF helps minimize the impact of parasitic impedances. OPA830 V OUT +5V V IN R G R T R F R C Figure 7. Compensated Noninverting Amplifier The Noise Gain can be calculated as follows: G 1 + 1 ) R F R G G 2 + 1 ) R T ) R F G 1 R C NG + G 1 G 2 A unity-gain buffer can be designed by selecting RT =RF = 20.0Ω and RC = 40.2Ω (do not use RG). This gives a noise gain of 2, so the response will be similar to the Characteristics Plots with G = +2. Decreasing RC to 20.0 Ω will increase the noise gain to 3, which typically gives a flat frequency response, but with less bandwidth. The circuit in Figure 1 can be redesigned to have less peaking by increasing the noise gain to 3. This is accomplished by adding RC = 2.55kΩ across the op amp inputs. (1) (2) (3) |
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