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STM32L151C6 Arkusz danych(PDF) 99 Page - STMicroelectronics |
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STM32L151C6 Arkusz danych(HTML) 99 Page - STMicroelectronics |
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99 / 131 page  DocID17659 Rev 9 99/131 STM32L151x6/8/B, STM32L152x6/8/B Electrical characteristics 105 General PCB design guidelines Power supply decoupling should be performed as shown in Figure 29 or Figure 30, depending on whether VREF+ is connected to VDDA or not. The 10 nF capacitors should be ceramic (good quality). They should be placed as close as possible to the chip. Figure 29. Power supply and reference decoupling (VREF+ not connected to VDDA) 1. VREF+ and VREF– inputs are available only on 100-pin packages. Figure 30. Power supply and reference decoupling (VREF+ connected to VDDA) 1. VREF+ and VREF– inputs are available only on 100-pin packages. VREF+ (see note 1) STM32Lxx VDDA VSSA /VREF– (see note 1) 1 μF // 100 nF 1 μF // 100 nF ai17857b VREF+/VDDA STM32Lxx 1 μF // 100 nF VREF–/VSSA ai17858a (See note 1) (See note 1) |
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