ZLED7010

40V LED Driver with Temperature Compensation

Data Sheet

August 12, 2010

© 2010 Zentrum Mikroelektronik Dresden AG — Rev. 1.1

All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the

prior written consent of the copyright owner. The information furnished in this publication is PRELIMINARY and subject to changes

without notice.

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8

Layout Requirements

8.1.

8.2.

Layout Considerations for LX (Pin 8)

Minimize the length of circuit board traces connected to the LX pin because it is a fast switching output.

8.3.

The C1 input decoupling capacitor must be placed as close as possible to the VIN pin to minimize power

supply noise, which can reduce efficiency. See section 3.2 regarding capacitor selection.

8.4.

Layout Considerations for GND (Pin 7)

The ZLED7010 GND (ground) pin must be soldered directly to the circuit board’s ground plane to minimize

ground bounce due to fast switching of the LX pin.

8.5.

When the application requires a driver chain of multiple ZLED7010s, noise might be coupled in if there are

capacitor must be connected between the line and ground to filter out the noise. The best practice is to

See Figure 5.1.

8.6.

NTC thermistor R3 is mounted close to the LEDs and remote from the ZLED7010, the PCB trace from R3 to

8.7.

Layout Considerations for High Voltage Traces

Avoid laying out any high voltage traces near the ADJ pin to minimize the risk of leakage in cases of board

contamination, which could raise the ADJ pin voltage resulting in unintentional output current. Leakage current

can be minimized by laying out a ground ring around the ADJ pin.

8.8.

Layout Considerations for the External Coil (L1)

The L1 coil must be placed as close as possible to the chip to minimize parasitic resistance and inductance,

which can reduce efficiency. The connection between the coil and the LX pin must be low resistance.

8.9.