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ADDR10 Arkusz danych(PDF) 21 Page - List of Unclassifed Manufacturers |
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ADDR10 Arkusz danych(HTML) 21 Page - List of Unclassifed Manufacturers |
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21 / 68 page ![]() Po wer su pp l y ww w.d i gi .c om 17 Figure 3: TRST_ termination Power supply TRST_ Test mode reset TRST_ operates the JTAG standard. Consult the JTAG specifications for use in boundary-scan testing. These signals meet the requirements of the Raven and Jeeni debuggers. TCK Test mode clock TCK operates the JTAG standard. Consult the JTAG specifications for use in boundary-scan testing. These signals meet the requirements of the Raven and Jeeni debuggers. Signal Pin Description Oscillator VCC (3.3V) N13, C3 Oscillator power supply Core VCC (1.5V) R8, L14, C14, C13 Core power supply I/O VCC (3.3V) E4, K4, M2, N3, P3, R5, H14, F14, B8, A3 I/O power supply GND D2, F1, J4, P4, P7, M8, P9, R11, K15, G15, E13, D13, B14, C11, A7, A5, B2, P2, P14, K13 Ground Mnemonic Signal Description |
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