MAX17543 datasheet(11/19 Pages) MAXIM

11 / 19 page

NAME

FUNCTION

VCC

5V LDO Output. Bypass VCC with 2.2µF ceramic capacitance to SGND.

SGND

Analog Ground

14–16

PGND

Power Ground. Connect the PGND pins externally to the power ground plane. Connect the SGND and

PGND pins together at the ground return path of the VCC bypass capacitor. Refer to the MAX17543 EV

kit data sheet for a layout example.

17–19

Switching Node. Connect LX pins to the switching-side of the inductor. Refer to the MAX17543 EV kit

data sheet for a layout example.

BST

Boost Flying Capacitor. Connect a 0.1µF ceramic capacitor between BST and LX.

—

Exposed Pad. Connect to the SGND pin. Connect to a large copper plane below the IC to improve heat

dissipation capability. Add thermal vias below the exposed pad. Refer to the MAX17543 EV kit data sheet

for a layout example.

VCC

SGND

1.215V

PGND

MODE

VIN

BST

LDO

EN/UVLO

MAX17543

SYNC

OSCILLATOR

SWITCHOVER

LOGIC

ERROR AMPLIFIER/

LOOP COMPENSATION

MODE

SELECTION

LOGIC

SLOPE

COMPENSATION

RESET

LOGIC

CURRENT-SENSE

LOGIC

HICCUP

5µA

VCC

PWM/

PFM/

HICCUP

LOGIC

AND

DRIVERS

VBG = 0.9V

RESET

EN/UVLO

MAX17543

4.5V–42V, 2.5A, High-Efficiency,

Synchronous Step-Down DC-DC Converter

with Internal Compensation

www.maximintegrated.com

Maxim Integrated │ 11

Pin Description (continued)

Block Diagram

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