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PS20037 Arkusz danych(PDF) 7 Page - List of Unclassifed Manufacturers |
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PS20037 Arkusz danych(HTML) 7 Page - List of Unclassifed Manufacturers |
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7 / 32 page ![]() PS20037 Data Sheet The output of the phase detector feeds a charge pump which combined with an external loop filter integrates the current pulses to control the varactor voltage. The charge pump current is automatically varied by the VCO control logic to compensate for VCO gain variations that are dependent on selected sub band. The varactor control voltage is externally coupled to the oscillator section through the input pin Vvar. 1.4 I2C Interface All programming for the PS20037 is controlled by an I2C data bus and is compatible with 3V3 standard mode formats. Data and Clock are fed in on the SDA and SCL lines respectively as defined by I2C bus format. The device can either accept data (write mode), or send data (read mode). The LSB of the address byte (R/W) sets the device into write mode if it is logic ‘0’, and read mode if it is logic ‘1’. The I2C address is fixed at C0 (Write)/C1(Read) in hex format. The PS20037 contains 16 control registers. These registers are read/write registers. These registers are addressed as sub-addresses on the I2C bus. Registers can be addressed as random access single write/read or random access sequential write and read as shown below. Random Access Single Write Random Access Sequential Write Stop Random Access Single Read Random Access Sequential Read W Write bit A Acknowledge Bit N Not Acknowledge A SLEEP pin is provided. This powers down all sections of the chip including the crystal oscillator and I2C interface. The RF bypass function will be operational in this mode providing it has been previously enabled through the I2C interface. Stop Start Device Address W A Register Address N A Register Data N A Stop Stop Start Device Address W A Register Address N A Register Data N A Register Data N+1 ... Register Data N+M A Stop Stop Start Device Address W A Register Address N A Start Device Address R A Register Data N N Stop Stop Start Device Address W A Register Address N A Start Device Address R A Register Data N A ... Register Data N+M N Stop Data Sheet 291468 issue 1 Plessey Semiconductors Ltd. Design & Technology Centre, Delta 500, Delta Business Park, Great Western Way, Swindon, UK SN5 7XE Tel: +44 1793 518000 Fax: +44 1793 518030 Web: www.plesseysemi.com 7 |
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