ML7344J datasheet(97/151 Pages) ETC2

97 / 151 page

FEDL7344C/E/J-04

ML7344C/E/J

97/151

●VCO low limit frequency setting

VCO low limit frequency can be set as described in the “channel frequency setting”. I is set to

[VCO_CAL_MIN_I:B1 0x4D] register, F is set to [VCO_CAL_MIN_FH:B1 0x4E], [VCO_CAL_MIN_FM:B1

0x4F], [VCO_CAL_MIN_FL:B1 0x50] in MSB – LSB order.

example) If operation low limit frequency is 426.6MHz, setting value should be lower than 400kHz. Then in

following example, low limit frequency is set to 426.MHz, master clock frequency is 26MHz.

I = 426MHz/26MHz (Integer part) = 16(0x10)

F =(426MHz/26MHz-16) * 2

20 (Integer part) = 403298 (0x062762)

Setting values for each register is as follows:

[VCO_CAL_MIN_I]

= 0x10

[VCO_CAL_MIN_FH]

= 0x06

[VCO_CAL_MIN_FM]

= 0x27

[VCO_CAL_MIN_FL]

= 0x62

●VCO upper limit frequency setting

VCO upper limit frequency is calculated as following formula, based on low limit frequency values and

[VCO_CAL_MAX_N:B1 0x51] register.

VCO calibration upper limit frequency =

VCO calibration low limit frequency (B1 0x4D-0x50) + ΔF(B1 0x51)

ΔF is defined in the table below

VCO_CAL_MAX_N[3:0]

ΔF[MHz]

0b0000

0b0001

0.8125

0b0010

1.625

0b0011

3.25

0b0100

6.5

0b0101

0b0110

0b0111

0b1000

82.875

0b1001

104

Other than above

prohibited

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