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GDC21D301A Arkusz danych(PDF) 27 Page - Hynix Semiconductor

Numer części GDC21D301A
Szczegółowy opis  Transport Decoder
PDF  35 Pages
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Producent  HYNIX [Hynix Semiconductor]
Strona internetowa  http://www.skhynix.com/kor/main.do
Logo HYNIX - Hynix Semiconductor

GDC21D301A Arkusz danych(HTML) 27 Page - Hynix Semiconductor

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GDC21D301A
PSI_n’ s data Buffer End Pointer Register (0x61a+ 4*N)
Same as Start pointer register. But the real end
address of data buffer is one less than this register
value, for example, the real end address of PSI_4
data buffer is equal to 0x61b which is calculated by
‘0x61c minus 0x001’. The buffer size is calculated
by the following.
Size = End Pointer - Start Pointer.
PSI_n’ s data Buffer Read Pointer Register (0x61c + 4*N)
Actually this register is not used. In order to read
data in this buffer, you should access local DRAM
directly like accessing internal register.
1) When M16 = ‘ 1’ (16Mbit DRAM used)
When it is ‘Write’, the lower 6 bits are written to
, and the value should be
located between
start
and end pointer. It is recommended that the initial
value is the same of the start pointer. When ‘Read’,
the lower 16 bits are read.
Internal Read Pointer Register
2) When M16 = ‘ 0’ (4Mbit DRAM used)
When it is ‘Write’, the lower 4 bits and higher 2
bits are written to ‘0’, and the value should be
located between start and end pointer. It is
recommended that this initial value is the same of
start pointer value. When ‘Read’, the lower 16 bits
are read.
Internal Read Pointer register
21
0
15
0
15
0
When ‘ Write’
6
5
When ‘ Read’
21
0
16 15
21
0
15
0
15
0
When ‘ Write’
4
3
When ‘ Read’
20 19
21
0
16 15



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