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ATMEGA8U2 Arkusz danych(PDF) 2 Page - ATMEL Corporation |
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ATMEGA8U2 Arkusz danych(HTML) 2 Page - ATMEL Corporation |
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2 / 310 page ![]() 2 7799E–AVR–09/2012 ATmega8U2/16U2/32U2 1. Pin Configurations Figure 1-1. Pinout Note: The large center pad underneath the QFN package should be soldered to ground on the board to ensure good mechanical stability. 1.1 Disclaimer Typical values contained in this datasheet are based on simulations and characterization of other AVR microcontrollers manufactured on the same process technology. Min and Max values will be available after the device is characterized. QFN32 (PCINT11 / AIN2 ) PC2 (OC.0B / INT0) PD0 VCC XTAL1 PB3 (PDO / MISO / PCINT3) GND (PC0) XTAL2 PB4 (T1 / PCINT4) 28 27 26 1 2 3 4 5 6 7 24 23 22 21 20 19 18 12 11 10 913 14 15 (AIN0 / INT1) PD1 8 16 17 PB6 (PCINT6) 25 29 30 31 32 PB7 (PCINT7 / OC.0A / OC.1C) PB5 (PCINT5) PC7 (INT4 / ICP1 / CLKO) PC6 (OC.1A / PCINT8) Reset (PC1 / dW) (RXD1 / AIN1 / INT2) PD2 TQFP32 (PCINT11 /AIN2 ) PC2 (OC.0B / INT0) PD0 VCC XTAL1 PB3 (PDO / MISO / PCINT3) GND (PC0) XTAL2 PB4 (T1 / PCINT4) 28 27 26 1 2 3 4 5 6 7 24 23 22 21 20 19 18 12 11 10 913 14 15 (AIN0 / INT1) PD1 8 16 17 PB6 (PCINT6) 25 29 30 31 32 PB7 (PCINT7 / OC.0A / OC.1C) PB5 (PCINT5) PC7 (INT4 / ICP1 / CLKO) PC6 (OC.1A / PCINT8) Reset (PC1 / dW) (RXD1 / AIN1 / INT2) PD2 |
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