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IDT74FST163383PA Arkusz danych(PDF) 5 Page - Integrated Device Technology

Numer części IDT74FST163383PA
Szczegółowy opis  20-BIT BUS EXCHANGE SWITCH
PDF  6 Pages
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Producent  IDT [Integrated Device Technology]
Strona internetowa  http://www.idt.com
Logo IDT - Integrated Device Technology

IDT74FST163383PA Arkusz danych(HTML) 5 Page - Integrated Device Technology

  IDT74FST163383PA Datasheet HTML 1Page - Integrated Device Technology IDT74FST163383PA Datasheet HTML 2Page - Integrated Device Technology IDT74FST163383PA Datasheet HTML 3Page - Integrated Device Technology IDT74FST163383PA Datasheet HTML 4Page - Integrated Device Technology IDT74FST163383PA Datasheet HTML 5Page - Integrated Device Technology IDT74FST163383PA Datasheet HTML 6Page - Integrated Device Technology  
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IDT74FST163383, IDT74FST1632383
20-BIT BUS EXCHANGE SWITCH
COMMERCIAL TEMPERATURE RANGE
5
TEST CIRCUITS AND WAVEFORMS
TEST CIRCUITS FOR ALL OUTPUTS
SWITCH POSITION
Pulse
Generator
R T
D.U.T.
VCC
VIN
C L
VOUT
50pF
500
Ω
500
Ω
7.0V
3V
1.5V
0V
3V
1.5V
0V
3V
1.5V
0V
3V
1.5V
0V
DATA
INPUT
TIMING
INPUT
ASYNCHRONOUS CONTROL
PRESET
CLEAR
ETC.
SYNCHRONOUS CONTROL
tSU
tH
tREM
tSU
tH
HIGH-LOW-HIGH
PULSE
LOW-HIGH-LOW
PULSE
tW
1.5V
1.5V
SAME PHASE
INPUT TRANSITION
3V
1.5V
0V
1.5V
VOH
tPLH
OUTPUT
OPPOSITE PHASE
INPUT TRANSITION
3V
1.5V
0V
tPLH
tPHL
tPHL
VOL
CONTROL
INPUT
3V
1.5V
0V
3.5V
0V
OUTPUT
NORMALLY
LOW
OUTPUT
NORMALLY
HIGH
SWITCH
CLOSED
SWITCH
OPEN
VOL
0.3V
0.3V
tPLZ
tPZL
tPZH
tPHZ
3.5V
0V
1.5V
1.5V
ENABLE
DISABLE
VOH
PRESET
CLEAR
CLOCK ENABLE
ETC.
ENABLE AND DISABLE TIMES
PROPAGATION DELAY
PULSE WIDTH
SET-UP, HOLD AND RELEASE TIMES
Test
Switch
Disable Low
Enable Low
Closed
All Other Tests
Open
Open Drain
DEFINITIONS:
CL=
Load capacitance: includes jig and probe capacitance.
RT
= Termination resistance: should be equal to Z
OUT
of the Pulse
Generator.
3474 lnk 08
3474 lnk 03
3474 lnk 04
3474 lnk 05
3474 lnk 06
3474 lnk 07
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control Disable-
HIGH
2. Pulse Generator for All Pulses: Rate
≤ 1.0MHz; tF ≤ 2.5ns; tR ≤ 2.5ns



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