8XC51FX datasheet(5/20 Pages) INTEL

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8XC51FX

Port 3 also serves the functions of various special

features of the MCS-51 Family as listed below

Port Pin

Alternate Function

P30

RXD (serial input port)

P31

TXD (serial output port)

P32

INT0 (external interrupt 0)

P33

INT1 (external interrupt 1)

P34

T0 (Timer 0 external input)

P35

T1 (Timer 1 external input)

P36

WR (external data memory write strobe)

P37

RD (external data memory read strobe)

RST

Reset input A high on this pin for two machine

cycles while the oscillator is running resets the de-

vice The port pins will be driven to their reset condi-

tion when a minimum VIH1 voltage is applied wheth-

er the oscillator is running or not An internal pull-

down resistor permits a power-on reset with only a

capacitor connected to VCC

ALE

Address Latch Enable output pulse for latching

the low byte of the address during accesses to ex-

ternal memory This pin (ALEPROG) is also the

program pulse input during EPROM programming for

the 87C51FX

In normal operation ALE is emitted at a constant

rate of

the oscillator frequency and may be used

for external timing or clocking purposes Note how-

ever that one ALE pulse is skipped during each ac-

cess to external Data Memory

If desired ALE operation can be disabled by setting

bit 0 of SFR location 8EH With this bit set the pin is

weakly pulled high However the ALE disable fea-

ture will be suspended during a MOVX or MOVC in-

struction idle mode power down mode and ICE

mode The ALE disable feature will be terminated by

reset When the ALE disable feature is suspended or

terminated the ALE pin will no longer be pulled up

weakly Setting the ALE-disable bit has no affect if

the microcontroller is in external execution mode

Throughout the remainder of this data sheet ALE

will refer to the signal coming out of the ALEPROG

pin and the pin will be referred to as the ALEPROG

PSEN

Program Store Enable is the read strobe to

external Program Memory

When the 8XC51FX is executing code from external

Program Memory PSEN is activated twice each ma-

chine cycle except that two PSEN activations are

skipped during each access to external Data Memo-

EA VPP External Access enable EA must be

strapped to VSS in order to enable the device to

fetch code from external Program Memory locations

0000H to 0FFFH Note however that if either of the

Program Lock bits are programmed EA will be inter-

nally latched on reset

EA should be strapped to VCC for internal program

executions

This pin also receives the programming supply volt-

age (VPP) during EPROM programming

XTAL1

Input to the inverting oscillator amplifier

XTAL2

Output from the inverting oscillator amplifi-

OSCILLATOR CHARACTERISTICS

XTAL1 and XTAL2 are the input and output respec-

tively of a inverting amplifier which can be config-

ured for use as an on-chip oscillator as shown in

Figure 3 Either a quartz crystal or ceramic resonator

may be used More detailed information concerning

the use of the on-chip oscillator is available in Appli-

cation Note AP-155 ‘‘Oscillators for Microcontrol-

lers’’

To drive the device from an external clock source

XTAL1 should be driven while XTAL2 floats as

shown in Figure 4 There are no requirements on the

duty cycle of the external clock signal since the in-

put to the internal clocking circuitry is through a

divide-by-two flip-flop but minimum and maximum

high and low times specified on the data sheet must

be observed

An external oscillator may encounter as much as a

100 pF load at XTAL1 when it starts up This is due

to interaction between the amplifier and its feedback

capacitance Once the external signal meets the VIL

and VIH specifications the capacitance will not ex-

ceed 20 pF

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