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CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

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ACTS08MS

Radiation Hardened

Quad 2-Input AND Gate

Pinouts

14 LEAD CERAMIC DUAL-IN-LINE

MIL-STD-1835 DESIGNATOR CDIP2-T14, LEAD FINISH C

TOP VIEW

14 LEAD CERAMIC FLAT PACK

MIL-STD-1835 DESIGNATOR CDFP3-F14, LEAD FINISH C

TOP VIEW

A1

B1

Y1

A2

B2

Y2

GND

VCC

B4

A4

Y4

B3

A3

Y3

1

2

3

4

5

6

7

14

13

12

11

10

9

8

14

13

12

11

10

9

8

2

3

4

5

6

7

1

A1

B1

Y1

A2

B2

Y2

GND

VCC

B4

A4

Y4

B3

A3

Y3

Features

• 1.25 Micron Radiation Hardened SOS CMOS

• Total Dose 300K RAD (Si)

• Single Event Upset (SEU) Immunity

• Latch-Up Free Under Any Conditions

• Significant Power Reduction Compared to ALSTTL Logic

• DC Operating Voltage Range: 4.5V to 5.5V

• Input Logic Levels

- VIL = 0.8V Max

- VIH = VCC/2 Min

• Input Current

≤1µA at VOL, VOH

Description

The Intersil ACTS08MS is a radiation hardened quad 2-Input

AND Gate. A high on both inputs forces the output to a high

logic level.

The ACTS08MS utilizes advanced CMOS/SOS technology to

achieve high-speed operation. This device is a member of a

radiation hardened, high-speed, CMOS/SOS Logic Family.

April 1995

Truth Table

INPUTS

OUTPUT

An

Bn

Yn

LL

L

LH

L

HL

L

HH

H

NOTE: L = Logic Level Low, H = Logic Level High

Functional Diagram

An

Bn

(1, 4, 9, 12)

(2, 5, 10, 13)

Yn

(3, 6, 8, 11)

Ordering Information

PART NUMBER

TEMPERATURE RANGE

SCREENING LEVEL

PACKAGE

ACTS08DMSR

Intersil Class S Equivalent

14 Lead SBDIP

ACTS08KMSR

Intersil Class S Equivalent

14 Lead Ceramic Flatpack

ACTS08D/Sample

Sample

14 Lead SBDIP

ACTS08K/Sample

Sample

14 Lead Ceramic Flatpack

ACTS08HMSR

Die

Die

Spec Number

518851

File Number

3994