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AN2484 Arkusz danych(PDF) 5 Page - STMicroelectronics

Numer części AN2484
Szczegółowy opis  STOTG04 in power down mode
PDF  10 Pages
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Producent  STMICROELECTRONICS [STMicroelectronics]
Strona internetowa  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

AN2484 Arkusz danych(HTML) 5 Page - STMicroelectronics

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AN2484
Driver biasing control
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3
Driver biasing control
To reduce power consumption, the STOTG04 allows the user to disable transmitter biasing
in receive mode. This feature is controlled through bit 1 in control register 3 (rec_bias_en).
Although, under normal operating conditions, this function does not affect the transceiver's
performance, laboratory tests have identified some issues when using it in conjunction with
controllers which have shorter than usual output enable-to-data transmission delay.
The problem lies in the time required to properly bias the differential driver, and may cause
compliance test failure.
If data is sent by the controller too early after the output enable signal goes low, the driver's
biasing transient could result in the first bit of the packet not being in line with USB specs.
Lab tests show a longer than expected first bit, which has a significant impact on the eye
pattern and evaluated jitter.
USB compliance software builds the eye diagram using the following algorithm:
once the data packet has been identified, the average data rate and bit time are computed.
Equally spaced (1 bit time) reference points are placed using as a base point the second
crossover of the USB data line. They are then shifted using a least square algorithm to
minimize error between ideal references and actual crossover points. The eye pattern is
then generated, segmenting the waveforms in 1 bit long segments, the limits of which are
the ideal references, and then overlapping each segment.
Figure 1 shows a USB FS data packet where the black points are the references, while the
green ones are actual crossover points.
The longer first bit mentioned above can be easily identified also. This timing error causes
the evaluated average bit rate to be lower than expected, which implies longer average bit
times and therefore higher distances between reference points. The result is a constant shift
in the position of the actual crossover points versus reference points and misalignment in
waveform segments. As a result, the output eye diagram (Figure 3) shows very high
apparent jitter and several mask violations, which lead to compliance test failure.



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