AN2841 datasheet(6/31 Pages) STMICROELECTRONICS

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Description of LED dimming

AN2841

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2.1

Driving multiple LED applications

Displays, indicators and panels increasingly use more and more LEDs. There are three

approaches for driving higher numbers of LEDs:

Dedicated pin

Each LED is driven by dedicated system (microcontroller, FPGA) pin.

Advantages: Simple implementation of dimming algorithm. No conversion.

Disadvantages: Unusable for high LED counts. Consumes pins of microcontroller.

Serial-parallel conversion

Multiple LEDs are driven by a single system pin.

Advantages: Reduced number of system pins required. High LED count systems can

be developed.

Disadvantages: Additional components and external buffers are needed. The data rate

on a single pin must be n times greater than that for the single LED out of n, where n is

the number of LEDs.

Matrix

LEDs are arranged in a square matrix and driven by a complex and sophisticated

algorithm that combines serial-parallel conversion with additional decomposition of the

serial data stream into the rows and columns by another active component.

This document focuses on serial-parallel conversion applications.

2.2

Multi-channel dimming using serial-parallel conversion

The serial-parallel conversion approach is in fact a parallel-serial-parallel conversion since

the data is stored in the system memory in parallel format and then is converted to serial

format before its transfer over the serial interface. The serial stream is then reconverted to

parallel format by the LED driver used to drive each LED. The serial data transfer speed

must be n times faster than driving a single LED, where n is the number of parallel driver

outputs.

Buffers (LED drivers) used for serial-parallel conversion come generally with the four most

important signals:

■ SDI:

Serial data in

■ SDO: Serial data out

■ CLK: Clock signal used for loading data in the driver buffer via the SDI (input) and

sending data from the buffer via the SDO (output). It also shifts all data actually

present (previously loaded) in the driver.

■ LE:

Copies (latch enable) the actual values loaded in the driver into its output cells.

The output cells drive parallel outputs.

The standard serial peripheral interface (SPI) contains SDO, SDI and CLK signals.

It is necessary to latch (LE signal pulse) internal driver data once per n CLK cycles, where

n is the total LED count. This latching rule ensures the correct mapping of the serialized

PWM data coming on SDI to the corresponding parallel output. Refer to Figure 2, Figure 3

and Figure 4.

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