Zakładka z wyszukiwarką danych komponentów
  Polish  ▼
ALLDATASHEET.PL

X  

AN1172 Arkusz danych(PDF) 3 Page - STMicroelectronics

Numer części AN1172
Szczegółowy opis  A logic-level transient-voltage protected AC switch
PDF  23 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Producent  STMICROELECTRONICS [STMicroelectronics]
Strona internetowa  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

AN1172 Arkusz danych(HTML) 3 Page - STMicroelectronics

  AN1172 Datasheet HTML 1Page - STMicroelectronics AN1172 Datasheet HTML 2Page - STMicroelectronics AN1172 Datasheet HTML 3Page - STMicroelectronics AN1172 Datasheet HTML 4Page - STMicroelectronics AN1172 Datasheet HTML 5Page - STMicroelectronics AN1172 Datasheet HTML 6Page - STMicroelectronics AN1172 Datasheet HTML 7Page - STMicroelectronics AN1172 Datasheet HTML 8Page - STMicroelectronics AN1172 Datasheet HTML 9Page - STMicroelectronics Next Button
Zoom Inzoom in Zoom Outzoom out
 3 / 23 page
background image
AN1172
ACS triggering mode
3/23
1
ACS triggering mode
1.1
Negative gate current
The ACS silicon structure is different from the triac one. For instance, the gate embeds a
diode junction. Then the gate current can only circulate in one direction, from the COM pin
to the Gate one. A peak reverse voltage (VGM) of this junction is also defined in the ACS
data sheet.
In order to sink a current from the gate by a microcontroller output port, the supply voltage
positive terminal must be connected to the drive reference, i.e. the COM pin of ACSs (see
Figure 1.).
An interesting benefit of such a connection is that the ACS is not fired when the MCU is at
reset state. Indeed, in this case, all the MCU port pins are at high level. This means that the
gate resistors are all connected to the COM terminal. No spurious triggering can then occur.
It should be noticed that for a direct switch / MCU connection, the MCU current capability is
not the only point to check to decide if the buffer circuit can be removed. Actually, the
transistor, used to amplify the MCU current in order to control the gate, also play an
overvoltage protection role. Annex B gives the gate voltage limits between which the MCU
output port will be not stressed. It is also shown that with ACSs, the gate voltage remains
inside these limits even with worst cases of dI/dt gradients at turn-on.
Figure 1.
Gate / MCU connection
MCU
Vdd
Vss
M1
M2
D1
D2
R
I
R
Com
Vg
G
Valve / PUMP
etc.
AC MAINS
L
N
Iout
Vs



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23


Arkusz danych Pobierz

Go To PDF Page


Link URL



Czy Alldatasheet okazała się pomocna?  [ DONATE ] 

O Alldatasheet   |   Reklama   |   Kontakt   |   Polityka prywatności   |   Link do karty katalogowej    |   Linki   |   Lista producentów
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com