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AN2030 Arkusz danych(PDF) 3 Page - STMicroelectronics |
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AN2030 Arkusz danych(HTML) 3 Page - STMicroelectronics |
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3 / 13 page ![]() 3/13 BACK EMF DETECTION DURING PWM ON TIME BY ST7MC Considering the parasitic capacitance Coes in the switches, the voltage in the floating phase will have some transition time during PWM off time. Figure 2 shows the circuit where the PWM is applied to phases A and B while phase C is floating. Figure 2. Phase C is floating We can simplify the circuit by using the neutral voltage Vn=1/2 * ec during PWM off time [1] and during PWM on time (see next chapter) to get the equivalent circuit in Figure 3. Figure 3. Simplified equivalent circuit when phase C is floating When PWM is on in phase A and B, the terminal voltage in steady state will be: which is the initial condition in the capacitor during PWM off time. L r ea r r L L Va Vb Vc Vdc GND Vn Coes Coes eb ec r L Vc 2*Coes ec 2 3 v c 1 2 ---v dc 3 2 ---e c + = (2) |
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